Fix regression in mode 4 introduced when advance_output_line was added

1 files changed, 1 insertions, 0 deletions

diff --git a/vdp.c b/vdp.c
index 22268f9..d7b98db 100644
--- a/vdp.c
+++ b/vdp.c
@@ -1972,6 +1972,7 @@ static void draw_right_border(vdp_context *context)
 		context->cycles += slot_cycles;\
 		if ((slot+1) == LINE_CHANGE_MODE4) {\
 			vdp_advance_line(context);\
+			advance_output_line(context);\
 			if (context->vcounter == 192) {\
 				return;\
 			}\