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authorMike Pavone <pavone@retrodev.com>2012-12-30 09:55:07 -0800
committerMike Pavone <pavone@retrodev.com>2012-12-30 09:55:07 -0800
commit73e3c1947cdca56def7fd6c470fba7a7f6905d2f (patch)
tree2e521ffd9163eef5c6aada131ce850f8d5ec38a1
parenta9efeb086e73201fc1b31287f88dcc8effcb0784 (diff)
Add support for pc indexed addressing mode to lea
-rw-r--r--m68k_to_x86.c45
1 files changed, 44 insertions, 1 deletions
diff --git a/m68k_to_x86.c b/m68k_to_x86.c
index 624c33a..bd112e4 100644
--- a/m68k_to_x86.c
+++ b/m68k_to_x86.c
@@ -1238,13 +1238,56 @@ uint8_t * translate_m68k_lea(uint8_t * dst, m68kinst * inst, x86_68k_options * o
dst = mov_irdisp8(dst, inst->src.params.regs.displacement + inst->address+2, CONTEXT, offsetof(m68k_context, aregs) + 4 * inst->dst.params.regs.pri, SZ_D);
}
break;
+ case MODE_PC_INDEX_DISP8:
+ dst = cycles(dst, BUS*3);//TODO: CHeck that this is correct
+ dst = mov_ir(dst, inst->address+2, SCRATCH1, SZ_D);
+ sec_reg = (inst->src.params.regs.sec >> 1) & 0x7;
+ if (inst->src.params.regs.sec & 1) {
+ if (inst->src.params.regs.sec & 0x10) {
+ if (opts->aregs[sec_reg] >= 0) {
+ dst = add_rr(dst, opts->aregs[sec_reg], SCRATCH1, SZ_D);
+ } else {
+ dst = add_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t)*sec_reg, SCRATCH1, SZ_D);
+ }
+ } else {
+ if (opts->dregs[sec_reg] >= 0) {
+ dst = add_rr(dst, opts->dregs[sec_reg], SCRATCH1, SZ_D);
+ } else {
+ dst = add_rdisp8r(dst, CONTEXT, offsetof(m68k_context, dregs) + sizeof(uint32_t)*sec_reg, SCRATCH1, SZ_D);
+ }
+ }
+ } else {
+ if (inst->src.params.regs.sec & 0x10) {
+ if (opts->aregs[sec_reg] >= 0) {
+ dst = movsx_rr(dst, opts->aregs[sec_reg], SCRATCH2, SZ_W, SZ_D);
+ } else {
+ dst = movsx_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + sizeof(uint32_t)*sec_reg, SCRATCH2, SZ_W, SZ_D);
+ }
+ } else {
+ if (opts->dregs[sec_reg] >= 0) {
+ dst = movsx_rr(dst, opts->dregs[sec_reg], SCRATCH2, SZ_W, SZ_D);
+ } else {
+ dst = movsx_rdisp8r(dst, CONTEXT, offsetof(m68k_context, dregs) + sizeof(uint32_t)*sec_reg, SCRATCH2, SZ_W, SZ_D);
+ }
+ }
+ dst = add_rr(dst, SCRATCH2, SCRATCH1, SZ_D);
+ }
+ if (inst->src.params.regs.displacement) {
+ dst = add_ir(dst, inst->src.params.regs.displacement, SCRATCH1, SZ_D);
+ }
+ if (dst_reg >= 0) {
+ dst = mov_rr(dst, SCRATCH1, dst_reg, SZ_D);
+ } else {
+ dst = mov_rrdisp8(dst, SCRATCH1, CONTEXT, reg_offset(&(inst->dst)), SZ_D);
+ }
+ break;
case MODE_ABSOLUTE:
case MODE_ABSOLUTE_SHORT:
dst = cycles(dst, (inst->src.addr_mode == MODE_ABSOLUTE) ? BUS * 3 : BUS * 2);
if (dst_reg >= 0) {
dst = mov_ir(dst, inst->src.params.immed, dst_reg, SZ_D);
} else {
- dst = mov_irdisp8(dst, inst->src.params.immed, CONTEXT, offsetof(m68k_context, aregs) + 4 * inst->dst.params.regs.pri, SZ_D);
+ dst = mov_irdisp8(dst, inst->src.params.immed, CONTEXT, reg_offset(&(inst->dst)), SZ_D);
}
break;
default: