diff options
| author | Michael Pavone <pavone@retrodev.com> | 2016-07-29 20:59:19 -0700 |
|---|---|---|
| committer | Michael Pavone <pavone@retrodev.com> | 2016-07-29 20:59:19 -0700 |
| commit | d115f42303163286a94e7ddba9d3e4706ce400c2 (patch) | |
| tree | c88b9d92484661b1aee0fcd4127f555336439f2e | |
| parent | 520c5c40b599e28697973cdf4e3fb5249fdb4701 (diff) | |
Implement undocumented flag bits for RLD and RRD
| -rw-r--r-- | z80_to_x86.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/z80_to_x86.c b/z80_to_x86.c index 912484e..69b7eff 100644 --- a/z80_to_x86.c +++ b/z80_to_x86.c @@ -1797,6 +1797,7 @@ void translate_z80inst(z80inst * inst, z80_context * context, uint16_t address, setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); + mov_rrdisp(code, opts->regs[Z80_A], opts->gen.context_reg, zf_off(ZF_XY), SZ_B); zreg_to_native(opts, Z80_HL, opts->gen.scratch2); ror_ir(code, 8, opts->gen.scratch1, SZ_W); @@ -1828,6 +1829,7 @@ void translate_z80inst(z80inst * inst, z80_context * context, uint16_t address, setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); + mov_rrdisp(code, opts->regs[Z80_A], opts->gen.context_reg, zf_off(ZF_XY), SZ_B); zreg_to_native(opts, Z80_HL, opts->gen.scratch2); ror_ir(code, 8, opts->gen.scratch1, SZ_W); |