diff options
| author | Michael Pavone <pavone@retrodev.com> | 2015-06-28 09:53:17 -0700 |
|---|---|---|
| committer | Michael Pavone <pavone@retrodev.com> | 2015-06-28 09:53:17 -0700 |
| commit | de641ad9418c0d95d58d83e5f4f37d24701c4dcf (patch) | |
| tree | a3a51f773670f92bb1f02113da947c78b8932ce3 | |
| parent | 85a13fa44481d4dafd548ed0e92654a9d6aea62f (diff) | |
More clang warning cleanup
| -rw-r--r-- | gdb_remote.c | 4 | ||||
| -rw-r--r-- | m68k_core_x86.c | 2 | ||||
| -rw-r--r-- | vdp.c | 2 |
3 files changed, 4 insertions, 4 deletions
diff --git a/gdb_remote.c b/gdb_remote.c index dd6a98a..764cf83 100644 --- a/gdb_remote.c +++ b/gdb_remote.c @@ -283,8 +283,8 @@ void gdb_run_command(m68k_context * context, uint32_t pc, char * command) char * rest; uint32_t address = strtoul(command+1, &rest, 16); uint32_t size = strtoul(rest+1, NULL, 16); - if (size > sizeof(send_buf-1)/2) { - size = sizeof(send_buf-1)/2; + if (size > (sizeof(send_buf)-1)/2) { + size = (sizeof(send_buf)-1)/2; } char *cur = send_buf; while (size) diff --git a/m68k_core_x86.c b/m68k_core_x86.c index 64e8866..5429bfd 100644 --- a/m68k_core_x86.c +++ b/m68k_core_x86.c @@ -1940,7 +1940,7 @@ void translate_m68k_andi_ori_ccr_sr(m68k_options *opts, m68kinst *inst) uint32_t base_flag = inst->op == M68K_ANDI_SR || inst->op == M68K_ANDI_CCR ? X0 : X1; for (int i = 0; i < 5; i++) { - if ((base_flag == X0) ^ (inst->src.params.immed & 1 << i) > 0) + if ((base_flag == X0) ^ ((inst->src.params.immed & 1 << i) > 0)) { flag_mask |= base_flag << ((4 - i) * 3); } @@ -256,7 +256,7 @@ void vdp_print_reg_explain(vdp_context * context) "01: %.2X | Display %s, V-ints %s, Height: %d, Mode %d\n" "0B: %.2X | E-ints %s, V-Scroll: %s, H-Scroll: %s\n" "0C: %.2X | Width: %d, Shadow/Highlight: %s\n", - context->regs[REG_MODE_1], context->regs[REG_MODE_1] & BIT_HINT_EN ? "enabled" : "disabled", context->regs[REG_MODE_1] & BIT_PAL_SEL != 0, + context->regs[REG_MODE_1], context->regs[REG_MODE_1] & BIT_HINT_EN ? "enabled" : "disabled", (context->regs[REG_MODE_1] & BIT_PAL_SEL) != 0, context->regs[REG_MODE_1] & BIT_HVC_LATCH ? "enabled" : "disabled", context->regs[REG_MODE_1] & BIT_DISP_DIS ? "disabled" : "enabled", context->regs[REG_MODE_2], context->regs[REG_MODE_2] & BIT_DISP_EN ? "enabled" : "disabled", context->regs[REG_MODE_2] & BIT_VINT_EN ? "enabled" : "disabled", context->regs[REG_MODE_2] & BIT_PAL ? 30 : 28, context->regs[REG_MODE_2] & BIT_MODE_5 ? 5 : 4, |