diff options
author | Michael Pavone <pavone@retrodev.com> | 2015-07-17 08:49:23 -0700 |
---|---|---|
committer | Michael Pavone <pavone@retrodev.com> | 2015-07-17 08:49:23 -0700 |
commit | fb73e9f0a60befdec0b81331e994cfd4424e1e65 (patch) | |
tree | c08cd91156942edee25b764812e32eb90a3a50e3 | |
parent | ec937eb637770838c92864d1d51393297a226d82 (diff) |
Add ability to change start address for VRAM viewer. Fix handling of DMA enable flag when it comes to DMA fills. This fixes a bug in James Pond 3
-rw-r--r-- | io.c | 2 | ||||
-rw-r--r-- | vdp.c | 9 |
2 files changed, 6 insertions, 5 deletions
@@ -248,7 +248,7 @@ void handle_binding_up(keybinding * binding) { case UI_DEBUG_MODE_INC: ui_debug_mode++; - if (ui_debug_mode == 4) { + if (ui_debug_mode == 7) { ui_debug_mode = 0; } genesis->vdp->debug = ui_debug_mode; @@ -910,15 +910,16 @@ void render_map_output(uint32_t line, int32_t col, vdp_context * context) } } } else { - uint32_t cell = (line / 8) * (context->regs[REG_MODE_4] & BIT_H40 ? 40 : 32) + col; - uint32_t address = cell * 32 + (line % 8) * 4; + uint32_t base = (context->debug - 3) * 0x200; + uint32_t cell = base + (line / 8) * (context->regs[REG_MODE_4] & BIT_H40 ? 40 : 32) + col; + uint32_t address = (cell * 32 + (line % 8) * 4) & 0xFFFF; for (int32_t i = 0; i < 4; i ++) { *(dst++) = context->colors[(context->debug_pal << 4) | (context->vdpmem[address] >> 4)]; *(dst++) = context->colors[(context->debug_pal << 4) | (context->vdpmem[address] & 0xF)]; address++; } cell++; - address = cell * 32 + (line % 8) * 4; + address = (cell * 32 + (line % 8) * 4) & 0xFFFF; for (int32_t i = 0; i < 4; i ++) { *(dst++) = context->colors[(context->debug_pal << 4) | (context->vdpmem[address] >> 4)]; *(dst++) = context->colors[(context->debug_pal << 4) | (context->vdpmem[address] & 0xF)]; @@ -1739,7 +1740,7 @@ int vdp_data_port_write(vdp_context * context, uint16_t value) cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY; cur->address = context->address; cur->value = value; - if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & 0xC0) == 0x80) { + if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & 0xC0) == 0x80 && (context->regs[REG_MODE_2] & BIT_DMA_ENABLE)) { context->flags |= FLAG_DMA_RUN; } cur->cd = context->cd; |