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| author | Michael Pavone <pavone@retrodev.com> | 2015-06-22 09:22:18 -0700 |
|---|---|---|
| committer | Michael Pavone <pavone@retrodev.com> | 2015-06-22 09:22:18 -0700 |
| commit | 67e7b127d579b5db3d8dffbff045c037569bcd31 (patch) | |
| tree | 47c8a09f15662f01761953767464144b74241772 | |
| parent | 130254db3165ed9c34a860f6d340521b45194e0e (diff) | |
Fix handling of address mask in gen_mem_fun
| -rw-r--r-- | backend_x86.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/backend_x86.c b/backend_x86.c index 75eece9..3e804b2 100644 --- a/backend_x86.c +++ b/backend_x86.c @@ -55,12 +55,12 @@ code_ptr gen_mem_fun(cpu_options * opts, memmap_chunk const * memmap, uint32_t n if (after_inc) { *after_inc = code->cur; } - if (opts->address_size == SZ_D && opts->address_mask < 0xFFFFFFFF) { - and_ir(code, opts->address_mask, opts->scratch1, SZ_D); - } - code_ptr lb_jcc = NULL, ub_jcc = NULL; uint8_t is_write = fun_type == WRITE_16 || fun_type == WRITE_8; uint8_t adr_reg = is_write ? opts->scratch2 : opts->scratch1; + if (opts->address_size == SZ_D && opts->address_mask != 0xFFFFFFFF) { + and_ir(code, opts->address_mask, adr_reg, SZ_D); + } + code_ptr lb_jcc = NULL, ub_jcc = NULL; uint16_t access_flag = is_write ? MMAP_WRITE : MMAP_READ; uint8_t size = (fun_type == READ_16 || fun_type == WRITE_16) ? SZ_W : SZ_B; uint32_t ram_flags_off = opts->ram_flags_off; |