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| author | Mike Pavone <pavone@retrodev.com> | 2013-09-15 23:33:24 -0700 |
|---|---|---|
| committer | Mike Pavone <pavone@retrodev.com> | 2013-09-15 23:33:24 -0700 |
| commit | 87c57b78120c4abbf386634b803ab87b2ec53498 (patch) | |
| tree | b01a08772eb3f83ec5351a761d337896e155efcc | |
| parent | a47dff5923490fd2a5ce5f53ee894f41e6e81962 (diff) | |
Remove read pending stuff, that had been added in an attempt to fix CRAM/VSRAM undefined bit results. Set number of bits actually saved in VSRAM to 11
| -rw-r--r-- | vdp.c | 8 |
1 files changed, 4 insertions, 4 deletions
@@ -399,11 +399,11 @@ void write_cram(vdp_context * context, uint16_t address, uint16_t value) void external_slot(vdp_context * context) { fifo_entry * start = context->fifo + context->fifo_read; - if (context->flags2 & FLAG2_READ_PENDING) { + /*if (context->flags2 & FLAG2_READ_PENDING) { context->flags2 &= ~FLAG2_READ_PENDING; context->flags |= FLAG_UNUSED_SLOT; return; - } + }*/ if (context->fifo_read >= 0 && start->cycle <= context->cycles) { switch (start->cd & 0xF) { @@ -1574,7 +1574,7 @@ uint16_t vdp_control_port_read(vdp_context * context) } #define CRAM_BITS 0xEEE -#define VSRAM_BITS 0x3FF +#define VSRAM_BITS 0x7FF #define VSRAM_DIRTY_BITS 0xF800 uint16_t vdp_data_port_read(vdp_context * context) @@ -1585,7 +1585,7 @@ uint16_t vdp_data_port_read(vdp_context * context) } //Not sure if the FIFO should be drained before processing a read or not, but it would make sense context->flags &= ~FLAG_UNUSED_SLOT; - context->flags2 |= FLAG2_READ_PENDING; + //context->flags2 |= FLAG2_READ_PENDING; while (!(context->flags & FLAG_UNUSED_SLOT)) { vdp_run_context(context, context->cycles + ((context->latched_mode & BIT_H40) ? 16 : 20)); } |