diff options
| author | Michael Pavone <pavone@retrodev.com> | 2020-04-25 18:10:40 -0700 |
|---|---|---|
| committer | Michael Pavone <pavone@retrodev.com> | 2020-04-25 18:10:40 -0700 |
| commit | 50a93edac0c361031cd6955cc84a8a6ac300d9b5 (patch) | |
| tree | 59d253801b72a2d17e26d72ed0beda8650d69d2f | |
| parent | ebf9b48261c0361eab36eb6b35703d599fec24c7 (diff) | |
Fix instruction timing for addq.w #i, (ay) in dynarec
| -rw-r--r-- | m68k_core_x86.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/m68k_core_x86.c b/m68k_core_x86.c index 6455e70..e88e219 100644 --- a/m68k_core_x86.c +++ b/m68k_core_x86.c @@ -1315,8 +1315,6 @@ void translate_m68k_arith(m68k_options *opts, m68kinst * inst, uint32_t flag_mas numcycles = 6; } else if (inst->op == M68K_AND && inst->variant == VAR_IMMEDIATE) { numcycles = 6; - } else if (inst->op == M68K_ADD && inst->dst.addr_mode == MODE_AREG && inst->extra.size == OPSIZE_WORD && inst->variant == VAR_QUICK) { - numcycles = 4; } else if (inst->dst.addr_mode <= MODE_AREG) { numcycles = inst->src.addr_mode <= MODE_AREG || inst->src.addr_mode == MODE_IMMEDIATE ? 8 : 6; } else { |