Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.

1 files changed, 1 insertions, 0 deletions

diff --git a/blastem.h b/blastem.h
index 6f8786f..ff05a69 100644
--- a/blastem.h
+++ b/blastem.h
@@ -34,6 +34,7 @@ typedef struct {
 	uint32_t       normal_clock; //Normal master clock (used to restore master clock after turbo mode)
 	uint8_t        bank_regs[8];
 	io_port        ports[3];
+	uint8_t        bus_busy;
 } genesis_context;
 
 extern genesis_context * genesis;