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authorMichael Pavone <pavone@retrodev.com>2019-01-25 14:13:46 -0800
committerMichael Pavone <pavone@retrodev.com>2019-01-25 14:13:46 -0800
commit719b1c2d59c31fd210f4754d69e717e6332dde25 (patch)
tree5a758c07e4a087f916266fd42439ff206f70b65a /cpu_dsl.py
parent9d22c5b349097fd576345cb0ea5715d17514d462 (diff)
Fix constant propagation to a non-ephemeral destination in CPU DSL
Diffstat (limited to 'cpu_dsl.py')
-rwxr-xr-xcpu_dsl.py4
1 files changed, 3 insertions, 1 deletions
diff --git a/cpu_dsl.py b/cpu_dsl.py
index ebed221..37fefd6 100755
--- a/cpu_dsl.py
+++ b/cpu_dsl.py
@@ -475,7 +475,9 @@ class NormalOp:
dst = maybeLocal
parent.regValues[dst] = result
if prog.isReg(dst):
- output.append(_opMap['mov'].generate(otype, prog, procParams, self.params))
+ shortProc = (procParams[0], procParams[-1])
+ shortParams = (self.params[0], self.params[-1])
+ output.append(_opMap['mov'].generate(otype, prog, shortProc, shortParams))
else:
output.append(opDef.generate(otype, prog, procParams, self.params))
elif self.op in prog.subroutines: