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authorMichael Pavone <pavone@retrodev.com>2018-10-06 17:33:15 -0700
committerMichael Pavone <pavone@retrodev.com>2018-10-06 17:33:15 -0700
commit441349cc260c0d95807b4d7469c2be5b3b62fbbb (patch)
treef4ea6c488b85eb01f205e8d0e9a815fb1a9fd7f1 /cpu_dsl.py
parent1dab348088655d41be46a1fa33f0e28c0695f86e (diff)
Implement program ROM reads
Diffstat (limited to 'cpu_dsl.py')
-rwxr-xr-xcpu_dsl.py11
1 files changed, 10 insertions, 1 deletions
diff --git a/cpu_dsl.py b/cpu_dsl.py
index 33ae62c..0788050 100755
--- a/cpu_dsl.py
+++ b/cpu_dsl.py
@@ -676,11 +676,15 @@ class If(ChildBlock):
class Registers:
def __init__(self):
self.regs = {}
+ self.pointers = {}
self.regArrays = {}
self.regToArray = {}
def addReg(self, name, size):
self.regs[name] = size
+
+ def addPointer(self, name, size):
+ self.pointers[name] = size
def addRegArray(self, name, size, regs):
self.regArrays[name] = (size, regs)
@@ -721,11 +725,16 @@ class Registers:
elif len(parts) > 2:
self.addRegArray(parts[0], int(parts[1]), parts[2:])
else:
- self.addReg(parts[0], int(parts[1]))
+ if parts[1].startswith('ptr'):
+ self.addPointer(parts[0], int(parts[1][3:]))
+ else:
+ self.addReg(parts[0], int(parts[1]))
return self
def writeHeader(self, otype, hFile):
fieldList = []
+ for pointer in self.pointers:
+ hFile.write('\n\tuint{sz}_t *{nm};'.format(nm=pointer, sz=self.pointers[pointer]))
for reg in self.regs:
if not self.isRegArrayMember(reg):
fieldList.append((self.regs[reg], 1, reg))