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authorMichael Pavone <pavone@retrodev.com>2019-01-28 21:30:23 -0800
committerMichael Pavone <pavone@retrodev.com>2019-01-28 21:30:23 -0800
commit53391a660236901354e6568c4fc31a0e682e1814 (patch)
tree59f55fb79cf319217014eac07487ef66cd0001f9 /cpu_dsl.py
parentb51fc1b2360dcf006d676b18f6042009e227bba1 (diff)
Less broken flag calulcation for sub instructions in CPU DSL
Diffstat (limited to 'cpu_dsl.py')
-rwxr-xr-xcpu_dsl.py7
1 files changed, 5 insertions, 2 deletions
diff --git a/cpu_dsl.py b/cpu_dsl.py
index e836e08..99d94d8 100755
--- a/cpu_dsl.py
+++ b/cpu_dsl.py
@@ -240,7 +240,8 @@ class Op:
decl,name = prog.getTemp(size)
dst = prog.carryFlowDst = name
prog.lastA = a
- prog.lastB = b
+ prog.lastB = '(-' + b + ')' if op == '-' else b
+ prog.lastWasSub = op == '-'
else:
dst = params[2]
return decl + '\n\t{dst} = {a} {op} {b};'.format(
@@ -312,7 +313,8 @@ def _updateFlagsCImpl(prog, params, rawParams):
resultBit = prog.paramSize(prog.lastDst)
elif calc == 'half':
resultBit = 4
- myRes = '({a} ^ {b} ^ {res})'.format(a = prog.lastA, b = prog.lastB, res = lastDst)
+ fmt = '({a} ^ {b} ^ ~{res})' if prog.lastWasSub else '({a} ^ {b} ^ {res})'
+ myRes = fmt.format(a = prog.lastA, b = prog.lastB, res = lastDst)
elif calc == 'overflow':
resultBit = prog.paramSize(prog.lastDst) - 1
myRes = '((~({a} ^ {b})) & ({a} ^ {res}))'.format(a = prog.lastA, b = prog.lastB, res = lastDst)
@@ -989,6 +991,7 @@ class Program:
self.carryFlowDst = None
self.lastA = None
self.lastB = None
+ self.lastWasSub = False
def __str__(self):
pieces = []