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authorMichael Pavone <pavone@retrodev.com>2014-12-26 19:36:41 -0800
committerMichael Pavone <pavone@retrodev.com>2014-12-26 19:36:41 -0800
commit4302e0d4fde15ebc79bc2e0f0cc2cf1246ba1074 (patch)
treeca31144cd5f2fe56187f39579749a963a88cdb62 /gen_x86.c
parentf9dade6a1ea8e660735a684ce9b80168e50064f7 (diff)
Fix reg-indirect mode for RBP/R13
Diffstat (limited to 'gen_x86.c')
-rw-r--r--gen_x86.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/gen_x86.c b/gen_x86.c
index b1b48d4..b1988fe 100644
--- a/gen_x86.c
+++ b/gen_x86.c
@@ -322,10 +322,17 @@ void x86_rrind_sizedir(code_info *code, uint8_t opcode, uint8_t reg, uint8_t bas
opcode |= BIT_SIZE;
}
*(out++) = opcode | dir;
- *(out++) = MODE_REG_INDIRECT | base | (reg << 3);
- if (base == RSP) {
- //add SIB byte, with no index and RSP as base
- *(out++) = (RSP << 3) | RSP;
+ if (base == RBP) {
+ //add a dummy 8-bit displacement since MODE_REG_INDIRECT with
+ //an R/M field of RBP selects RIP, relative addressing
+ *(out++) = MODE_REG_DISPLACE8 | base | (reg << 3);
+ *(out++) = 0;
+ } else {
+ *(out++) = MODE_REG_INDIRECT | base | (reg << 3);
+ if (base == RSP) {
+ //add SIB byte, with no index and RSP as base
+ *(out++) = (RSP << 3) | RSP;
+ }
}
code->cur = out;
}