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authorMichael Pavone <pavone@retrodev.com>2015-11-08 15:51:57 -0800
committerMichael Pavone <pavone@retrodev.com>2015-11-08 15:51:57 -0800
commitc125d82e2076aad6d24062212c55e5db834cd90c (patch)
treed7dde6fdb87a935ae431517da1e609b1b9e7506b /m68k_core_x86.c
parente4c347d394fc7ee86e8c7bb6d10029ad7157a6d5 (diff)
Initial work for allowing loading a ROM from menu
Diffstat (limited to 'm68k_core_x86.c')
-rw-r--r--m68k_core_x86.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/m68k_core_x86.c b/m68k_core_x86.c
index 62f0d6a..fca07b5 100644
--- a/m68k_core_x86.c
+++ b/m68k_core_x86.c
@@ -2509,7 +2509,14 @@ void init_m68k_opts(m68k_options * opts, memmap_chunk * memmap, uint32_t num_chu
mov_rr(code, RAX, opts->gen.context_reg, SZ_PTR);
jmp(code, opts->gen.load_context);
*skip_sync = code->cur - (skip_sync+1);
+ cmp_irdisp(code, 0, opts->gen.context_reg, offsetof(m68k_context, should_return), SZ_B);
+ code_ptr do_ret = code->cur + 1;
+ jcc(code, CC_NZ, do_ret);
retn(code);
+ *do_ret = code->cur - (do_ret+1);
+ pop_r(code, opts->gen.scratch1);
+ retn(code);
+ mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, resume_pc), SZ_PTR);
*do_int = code->cur - (do_int+1);
//implement 1 instruction latency
cmp_irdisp(code, 0, opts->gen.context_reg, offsetof(m68k_context, int_pending), SZ_B);