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authorMichael Pavone <pavone@retrodev.com>2017-03-18 17:09:14 -0700
committerMichael Pavone <pavone@retrodev.com>2017-03-18 17:09:14 -0700
commit401596ec874495e53dc65290f08393fc9aed804d (patch)
tree4f375ebdf43b7b469abe9ffecf088678e76e16ac /vdp.c
parentc56f74f0913bc7c2ab200dee194b1d3df5d93522 (diff)
Remove hacky post-DMA delay add proper pre-DMA delay based on logic analyzer capture. 512 color screen is a bit messed up but mostly works. Needs investigation
Diffstat (limited to 'vdp.c')
-rw-r--r--vdp.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/vdp.c b/vdp.c
index f97f42e..51f767e 100644
--- a/vdp.c
+++ b/vdp.c
@@ -2482,13 +2482,16 @@ int vdp_control_port_write(vdp_context * context, uint16_t value)
//
if((context->regs[REG_DMASRC_H] & 0xC0) != 0x80) {
//DMA copy or 68K -> VDP, transfer starts immediately
- context->flags |= FLAG_DMA_RUN;
context->dma_cd = context->cd;
//printf("DMA start (length: %X) at cycle %d, frame: %d, vcounter: %d, hslot: %d\n", (context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L], context->cycles, context->frame, context->vcounter, context->hslot);
if (!(context->regs[REG_DMASRC_H] & 0x80)) {
//printf("DMA Address: %X, New CD: %X, Source: %X, Length: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_H] << 17) | (context->regs[REG_DMASRC_M] << 9) | (context->regs[REG_DMASRC_L] << 1), context->regs[REG_DMALEN_H] << 8 | context->regs[REG_DMALEN_L]);
+ //68K -> VDP DMA takes 4 slots to actually start reading even though it acquires the bus immediately
+ vdp_run_context(context, context->cycles + 16 * ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_4] & BIT_H40) ? 4 : 5));
+ context->flags |= FLAG_DMA_RUN;
return 1;
} else {
+ context->flags |= FLAG_DMA_RUN;
//printf("DMA Copy Address: %X, New CD: %X, Source: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]);
}
} else {