diff options
| author | Michael Pavone <pavone@retrodev.com> | 2019-02-25 21:22:14 -0800 |
|---|---|---|
| committer | Michael Pavone <pavone@retrodev.com> | 2019-02-25 21:22:14 -0800 |
| commit | 05486c58290b93fd458feb332b1e4de476b02e99 (patch) | |
| tree | aae1ca21195326ca65102ec8d3e357acf124dfdd /z80_to_x86.c | |
| parent | fbd662e1eb865eef7eec7ba512c515f584210796 (diff) | |
More instruction timing fixes in old Z80 core
Diffstat (limited to 'z80_to_x86.c')
| -rw-r--r-- | z80_to_x86.c | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/z80_to_x86.c b/z80_to_x86.c index 66fc3cb..c263e56 100644 --- a/z80_to_x86.c +++ b/z80_to_x86.c @@ -355,6 +355,8 @@ void translate_z80inst(z80inst * inst, z80_context * context, uint16_t address, } if (inst->reg == Z80_I || inst->ea_reg == Z80_I || inst->reg == Z80_R || inst->ea_reg == Z80_R) { num_cycles += 1; + } else if (inst->reg == Z80_USE_IMMED) { + num_cycles += 3; } break; case Z80_IMMED: @@ -368,9 +370,6 @@ void translate_z80inst(z80inst * inst, z80_context * context, uint16_t address, num_cycles += 8; //3 for displacement, 5 for address addition break; } - if (inst->reg == Z80_USE_IMMED) { - num_cycles += 3; - } cycles(&opts->gen, num_cycles); if (inst->addr_mode & Z80_DIR) { translate_z80_ea(inst, &dst_op, opts, DONT_READ, MODIFY); @@ -945,7 +944,7 @@ void translate_z80inst(z80inst * inst, z80_context * context, uint16_t address, } else if(inst->addr_mode == Z80_IMMED) { num_cycles += 3; } else if(z80_size(inst) == SZ_W) { - num_cycles += 4; + num_cycles += 7; } cycles(&opts->gen, num_cycles); translate_z80_reg(inst, &dst_op, opts); @@ -1076,7 +1075,7 @@ void translate_z80inst(z80inst * inst, z80_context * context, uint16_t address, } else if(inst->addr_mode == Z80_IMMED) { num_cycles += 3; } else if(z80_size(inst) == SZ_W) { - num_cycles += 4; + num_cycles += 7; } cycles(&opts->gen, num_cycles); translate_z80_reg(inst, &dst_op, opts); @@ -1264,6 +1263,10 @@ void translate_z80inst(z80inst * inst, z80_context * context, uint16_t address, case Z80_DEC: if(z80_size(inst) == SZ_W) { num_cycles += 2; + } else if (inst->addr_mode == Z80_REG_INDIRECT) { + num_cycles += 1; + } else if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { + num_cycles += 9; } cycles(&opts->gen, num_cycles); translate_z80_reg(inst, &dst_op, opts); @@ -1917,7 +1920,7 @@ void translate_z80inst(z80inst * inst, z80_context * context, uint16_t address, } case Z80_SET: { if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { - num_cycles += 8; + num_cycles += 4; } cycles(&opts->gen, num_cycles); uint8_t bit; @@ -1986,7 +1989,7 @@ void translate_z80inst(z80inst * inst, z80_context * context, uint16_t address, } case Z80_RES: { if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { - num_cycles += 8; + num_cycles += 4; } cycles(&opts->gen, num_cycles); uint8_t bit; |