diff options
author | Mike Pavone <pavone@retrodev.com> | 2013-06-24 21:32:25 -0700 |
---|---|---|
committer | Mike Pavone <pavone@retrodev.com> | 2013-06-24 21:32:25 -0700 |
commit | f8296ee1fa057adc180ed4d6a2066a841dbe74c4 (patch) | |
tree | 60ea83ccfa73b1c75c99d9705a7a375613f2a43e /z80_to_x86.c | |
parent | da088cadfb4c361fd91aeb9a5fb0147164978daf (diff) |
Fix access to int_enable_cycle in EI
Diffstat (limited to 'z80_to_x86.c')
-rw-r--r-- | z80_to_x86.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/z80_to_x86.c b/z80_to_x86.c index 4faf4cc..6ac701d 100644 --- a/z80_to_x86.c +++ b/z80_to_x86.c @@ -901,11 +901,11 @@ uint8_t * translate_z80inst(z80inst * inst, uint8_t * dst, z80_context * context break; case Z80_EI: dst = zcycles(dst, 4); - dst = mov_rrdisp8(dst, ZCYCLES, CONTEXT, offsetof(z80_context, int_enable_cycle), SZ_D); + dst = mov_rrdisp32(dst, ZCYCLES, CONTEXT, offsetof(z80_context, int_enable_cycle), SZ_D); dst = mov_irdisp8(dst, 1, CONTEXT, offsetof(z80_context, iff1), SZ_B); dst = mov_irdisp8(dst, 1, CONTEXT, offsetof(z80_context, iff2), SZ_B); //interrupt enable has a one-instruction latency, minimum instruction duration is 4 cycles - dst = add_irdisp8(dst, 4, CONTEXT, offsetof(z80_context, int_enable_cycle), SZ_D); + dst = add_irdisp32(dst, 4, CONTEXT, offsetof(z80_context, int_enable_cycle), SZ_D); dst = call(dst, (uint8_t *)z80_do_sync); break; case Z80_IM: |