diff options
| -rwxr-xr-x | cpu_dsl.py | 20 |
1 files changed, 19 insertions, 1 deletions
@@ -385,13 +385,31 @@ def _sextCImpl(prog, params, rawParms): else: fmt = '\n\t{dst} = {src} & 0x8000 ? {src} | 0xFFFF0000 : {src};' return fmt.format(src=params[1], dst=params[2]) - + +def _adcCImpl(prog, params, rawParams): + carryFlag = None + for flag in prog.flags.flagCalc: + if prog.flags.flagCalc[flag] == 'carry': + carryFlag = flag + if carryFlag is None: + raise Exception('adc requires a defined carry flag') + base = '\n\t{dst} = {a} + {b} + ('.format(dst = params[2], a = params[0], b = params[1]) + carryStorage = prog.flags.getStorage(carryFlag) + if type(carryStorage) is tuple: + reg,bit = carryStorage + reg = prog.resolveReg(reg, None, (), False) + check = '({reg} & 1 << {bit})'.format(reg=reg, bit=bit) + else: + check = prog.resolveReg(carryStorage, None, (), False) + return base + check + ' ? 1 : 0);' + _opMap = { 'mov': Op(lambda val: val).cUnaryOperator(''), 'not': Op(lambda val: ~val).cUnaryOperator('~'), 'lnot': Op(lambda val: 0 if val else 1).cUnaryOperator('!'), 'neg': Op(lambda val: -val).cUnaryOperator('-'), 'add': Op(lambda a, b: a + b).cBinaryOperator('+'), + 'adc': Op().addImplementation('c', 2, _adcCImpl), 'sub': Op(lambda a, b: b - a).cBinaryOperator('-'), 'lsl': Op(lambda a, b: a << b).cBinaryOperator('<<'), 'lsr': Op(lambda a, b: a >> b).cBinaryOperator('>>'), |