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-rwxr-xr-xcpu_dsl.py19
-rw-r--r--z80.cpu1
-rw-r--r--z80_util.c24
3 files changed, 36 insertions, 8 deletions
diff --git a/cpu_dsl.py b/cpu_dsl.py
index 0f95fda..7bce683 100755
--- a/cpu_dsl.py
+++ b/cpu_dsl.py
@@ -1032,8 +1032,8 @@ class Registers:
def addReg(self, name, size):
self.regs[name] = size
- def addPointer(self, name, size):
- self.pointers[name] = size
+ def addPointer(self, name, size, count):
+ self.pointers[name] = (size, count)
def addRegArray(self, name, size, regs):
self.regArrays[name] = (size, regs)
@@ -1070,12 +1070,15 @@ class Registers:
def processLine(self, parts):
if len(parts) == 3:
- self.addRegArray(parts[0], int(parts[1]), int(parts[2]))
+ if parts[1].startswith('ptr'):
+ self.addPointer(parts[0], parts[1][3:], int(parts[2]))
+ else:
+ self.addRegArray(parts[0], int(parts[1]), int(parts[2]))
elif len(parts) > 2:
self.addRegArray(parts[0], int(parts[1]), parts[2:])
else:
if parts[1].startswith('ptr'):
- self.addPointer(parts[0], parts[1][3:])
+ self.addPointer(parts[0], parts[1][3:], 1)
else:
self.addReg(parts[0], int(parts[1]))
return self
@@ -1084,13 +1087,17 @@ class Registers:
fieldList = []
for pointer in self.pointers:
stars = '*'
- ptype = self.pointers[pointer]
+ ptype, count = self.pointers[pointer]
while ptype.startswith('ptr'):
stars += '*'
ptype = ptype[3:]
if ptype.isdigit():
ptype = 'uint{sz}_t'.format(sz=ptype)
- hFile.write('\n\t{ptype} {stars}{nm};'.format(nm=pointer, ptype=ptype, stars=stars))
+ if count > 1:
+ arr = '[{n}]'.format(n=count)
+ else:
+ arr = ''
+ hFile.write('\n\t{ptype} {stars}{nm}{arr};'.format(nm=pointer, ptype=ptype, stars=stars, arr=arr))
for reg in self.regs:
if not self.isRegArrayMember(reg):
fieldList.append((self.regs[reg], 1, reg))
diff --git a/z80.cpu b/z80.cpu
index 3261187..c126258 100644
--- a/z80.cpu
+++ b/z80.cpu
@@ -34,6 +34,7 @@ regs
io_map ptrmemmap_chunk
io_chunks 32
io_mask 32
+ fastmem ptr8 64
flags
register f
diff --git a/z80_util.c b/z80_util.c
index e1f0855..1ccc40c 100644
--- a/z80_util.c
+++ b/z80_util.c
@@ -3,13 +3,23 @@
void z80_read_8(z80_context *context)
{
context->cycles += 3 * context->opts->gen.clock_divider;
- context->scratch1 = read_byte(context->scratch1, NULL, &context->opts->gen, context);
+ uint8_t *fast = context->fastmem[context->scratch1 >> 10];
+ if (fast) {
+ context->scratch1 = fast[context->scratch1 & 0x3FF];
+ } else {
+ context->scratch1 = read_byte(context->scratch1, NULL, &context->opts->gen, context);
+ }
}
void z80_write_8(z80_context *context)
{
context->cycles += 3 * context->opts->gen.clock_divider;
- write_byte(context->scratch2, context->scratch1, NULL, &context->opts->gen, context);
+ uint8_t *fast = context->fastmem[context->scratch2 >> 10];
+ if (fast) {
+ fast[context->scratch2 & 0x3FF] = context->scratch1;
+ } else {
+ write_byte(context->scratch2, context->scratch1, NULL, &context->opts->gen, context);
+ }
}
void z80_io_read8(z80_context *context)
@@ -69,6 +79,16 @@ z80_context * init_z80_context(z80_options *options)
context->io_map = (memmap_chunk *)tmp_io_chunks;
context->io_chunks = tmp_num_io_chunks;
context->io_mask = tmp_io_mask;
+ for(uint32_t address = 0; address < 0x10000; address+=1024)
+ {
+ uint8_t *start = get_native_pointer(address, NULL, &options->gen);
+ if (start) {
+ uint8_t *end = get_native_pointer(address + 1023, NULL, &options->gen);
+ if (end && end - start == 1023) {
+ context->fastmem[address >> 10] = start;
+ }
+ }
+ }
return context;
}