diff options
-rw-r--r-- | blastem.c | 4 | ||||
-rw-r--r-- | z80_to_x86.c | 3 | ||||
-rw-r--r-- | z80_to_x86.h | 1 | ||||
-rw-r--r-- | zruntime.S | 1 |
4 files changed, 7 insertions, 2 deletions
@@ -170,8 +170,8 @@ void sync_z80(z80_context * z_context, uint32_t mclks) z_context->sync_cycle = mclks / MCLKS_PER_Z80; uint32_t vint_cycle = vdp_next_vint_z80(gen->vdp) / MCLKS_PER_Z80; while (z_context->current_cycle < z_context->sync_cycle) { - if (z_context->iff1 && z_context->current_cycle < ZVINT_CYCLE) { - z_context->int_cycle = vint_cycle; + if (z_context->iff1 && z_context->current_cycle < vint_cycle) { + z_context->int_cycle = vint_cycle < z_context->int_enable_cycle ? z_context->int_enable_cycle : vint_cycle; } z_context->target_cycle = z_context->sync_cycle < z_context->int_cycle ? z_context->sync_cycle : z_context->int_cycle; dprintf("Running Z80 from cycle %d to cycle %d. Native PC: %p\n", z_context->current_cycle, z_context->sync_cycle, z_context->native_pc); diff --git a/z80_to_x86.c b/z80_to_x86.c index 19b76ce..a458011 100644 --- a/z80_to_x86.c +++ b/z80_to_x86.c @@ -893,8 +893,11 @@ uint8_t * translate_z80inst(z80inst * inst, uint8_t * dst, z80_context * context case Z80_EI: //TODO: Implement interrupt enable latency of 1 instruction afer EI dst = zcycles(dst, 4); + dst = mov_rrdisp8(dst, ZCYCLES, CONTEXT, offsetof(z80_context, int_enable_cycle), SZ_D); dst = mov_irdisp8(dst, 1, CONTEXT, offsetof(z80_context, iff1), SZ_B); dst = mov_irdisp8(dst, 1, CONTEXT, offsetof(z80_context, iff2), SZ_B); + //interrupt enable has a one-instruction latency, minimum instruction duration is 4 cycles + dst = add_irdisp8(dst, 4, CONTEXT, offsetof(z80_context, int_enable_cycle), SZ_D); dst = call(dst, (uint8_t *)z80_do_sync); break; case Z80_IM: diff --git a/z80_to_x86.h b/z80_to_x86.h index 93af9cc..9c70516 100644 --- a/z80_to_x86.h +++ b/z80_to_x86.h @@ -49,6 +49,7 @@ typedef struct { void * options; void * system; uint8_t ram_code_flags[(8 * 1024)/128/8]; + uint32_t int_enable_cycle; } z80_context; void translate_z80_stream(z80_context * context, uint32_t address); @@ -38,6 +38,7 @@ z80_handle_cycle_limit_int: cmp 116(%rsi), %ebp jb zskip_int mov 112(%rsi), %ebp /* set cycle limit to sync cycle */ + movl $0xFFFFFFFF, 116(%rsi) /* make sure the interrupt doesn't fire more than once */ add $7, %ebp sub $2, %r9w mov %r9w, %r14w |