diff options
| -rw-r--r-- | backend_x86.c | 1 | ||||
| -rw-r--r-- | gen_x86.c | 12 | ||||
| -rw-r--r-- | m68k_core.c | 4 |
3 files changed, 12 insertions, 5 deletions
diff --git a/backend_x86.c b/backend_x86.c index 5a1f5d5..d606886 100644 --- a/backend_x86.c +++ b/backend_x86.c @@ -175,6 +175,7 @@ code_ptr gen_mem_fun(cpu_options * opts, memmap_chunk const * memmap, uint32_t n mov_rr(code, opts->scratch2, opts->scratch1, opts->address_size); shr_ir(code, opts->ram_flags_shift, opts->scratch1, opts->address_size); bt_rrdisp(code, opts->scratch1, opts->context_reg, ram_flags_off, opts->address_size); + //FIXME: These adjustments to ram_flags_off need to take into account bits vs bytes and ram_flags_shift if (memmap[chunk].mask == opts->address_mask) { ram_flags_off += memmap[chunk].end - memmap[chunk].start; } else { @@ -2135,9 +2135,15 @@ uint32_t x86_inst_size(code_ptr start) if (has_modrm(prefix, main_op)) { uint8_t mod_rm = *(code++); if (has_sib(mod_rm)) { - uint8_t sib = *(code++); - } else { - + //sib takes up a byte, but can't add any additional ones beyond that + code++; + } + uint8_t mode = mod_rm & 0xC0; + uint8_t rm = mod_rm & 3; + if (mode == MODE_REG_DISPLACE8) { + code++; + } else if (mode == MODE_REG_DISPLACE32 || (mode == MODE_REG_INDIRECT && rm == RBP)) { + code += 4; } } else { } diff --git a/m68k_core.c b/m68k_core.c index ff6278c..d3125a9 100644 --- a/m68k_core.c +++ b/m68k_core.c @@ -606,7 +606,7 @@ void map_native_address(m68k_context * context, uint32_t address, code_ptr nativ uint32_t masked = (address & opts->gen.memmap[i].mask); uint32_t final_off = masked + meta_off; uint32_t ram_flags_off = final_off >> (opts->gen.ram_flags_shift + 3); - context->ram_code_flags[ram_flags_off] |= 1 << ((final_off >> opts->gen.ram_flags_shift) & 3); + context->ram_code_flags[ram_flags_off] |= 1 << ((final_off >> opts->gen.ram_flags_shift) & 7); uint32_t slot = final_off / 1024; if (!opts->gen.ram_inst_sizes[slot]) { @@ -618,7 +618,7 @@ void map_native_address(m68k_context * context, uint32_t address, code_ptr nativ masked = (address + size - 1) & opts->gen.memmap[i].mask; final_off = masked + meta_off; ram_flags_off = final_off >> (opts->gen.ram_flags_shift + 3); - context->ram_code_flags[ram_flags_off] |= 1 << ((final_off >> opts->gen.ram_flags_shift) & 3); + context->ram_code_flags[ram_flags_off] |= 1 << ((final_off >> opts->gen.ram_flags_shift) & 7); } break; } else if ((opts->gen.memmap[i].flags & (MMAP_WRITE | MMAP_CODE)) == (MMAP_WRITE | MMAP_CODE)) { |