diff options
| -rw-r--r-- | vdp.c | 62 |
1 files changed, 60 insertions, 2 deletions
@@ -500,7 +500,7 @@ static void redraw_debug_sprite(vdp_context *context, uint32_t *fb, uint32_t til } } -static void redraw_debug_sprites_with_correct_colors(vdp_context * context, uint32_t *fb) +static void redraw_debug_sprites_sat(vdp_context * context, uint32_t *fb) { if (context->regs[REG_MODE_2] & BIT_MODE_5) { uint16_t sat_address = mode5_sat_address(context); @@ -528,6 +528,63 @@ static void redraw_debug_sprites_with_correct_colors(vdp_context * context, uint } } +static void redraw_debug_sprites_planes(vdp_context * context, uint32_t *fb) +{ + uint16_t vscroll_mask = 0x1F | (context->regs[REG_SCROLL] & 0x30) << 1; + uint16_t hscroll_mask = 0x1F; + uint16_t v_mul = 64; + switch(context->regs[REG_SCROLL] & 0x3) + { + case 0x1: + hscroll_mask = 0x3F; + v_mul = 128; + break; + case 0x2: + //TODO: Verify this behavior + v_mul = 0; + break; + case 0x3: + hscroll_mask = 0x7F; + v_mul = 256; + break; + } + for (unsigned plane = 0; plane < 3; plane++) { + uint16_t table_address = (context->regs[REG_SCROLL_A] << 10) & 0xE000;; + switch(plane) + { + case 1: + table_address = context->regs[REG_SCROLL_B] << 13 & 0xE000; + break; + case 2: + table_address = context->regs[REG_WINDOW] << 10; + if (context->regs[REG_MODE_4] & BIT_H40) { + table_address &= 0xF000; + v_mul = 128; + hscroll_mask = 0x3F; + } else { + table_address &= 0xF800; + v_mul = 64; + hscroll_mask = 0x1F; + } + vscroll_mask = 0x1F; + break; + } + const uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR & 0x3F]]; + for (uint16_t row = 0; row < 128; row++) + { + const uint16_t row_address = table_address + (row & vscroll_mask) * v_mul; + for (uint16_t col = 0; col < 128; col++) + { + const uint16_t address = row_address + (col & hscroll_mask) * 2; + const uint16_t entry = context->vdpmem[address] << 8 | context->vdpmem[address + 1]; + const uint16_t tile_id = 0x7FF & entry; + const uint8_t pal = (entry >> 9 & 0x30) / 16u; + redraw_debug_sprite(context, fb, tile_id, pal); + } + } + } +} + #define VRAM_READ 0 //0000 #define VRAM_WRITE 1 //0001 //2 would trigger register write 0010 @@ -2105,7 +2162,8 @@ static void vdp_update_per_frame_debug(vdp_context *context) } } - redraw_debug_sprites_with_correct_colors(context, fb); + redraw_debug_sprites_sat(context, fb); + redraw_debug_sprites_planes(context, fb); render_framebuffer_updated(context->debug_fb_indices[VDP_DEBUG_VRAM], 1024); } |