summaryrefslogtreecommitdiff
path: root/68kinst.c
AgeCommit message (Collapse)Author
2013-06-19Fix movem with pc displacement or pc indexed sourceMike Pavone
2013-05-12Fixed decoding of CHK destinationMike Pavone
2013-01-26Tweaks to make blastem compatible with m68k-testerMike Pavone
2013-01-17Add instruction address logging to translator and support for reading an ↵Mike Pavone
address log to the disassembler
2013-01-13Fix a bunch of bugs in the CPU core, add a 68K debuggerMike Pavone
2013-01-09Fix (a7)+ src when size is byte, fix trap return address, make div with areg ↵Mike Pavone
src decoded to invalid
2013-01-09Fix signed division with negative result, fix address reg destination with ↵Mike Pavone
word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions
2013-01-06Print a message when we try to run an invalid instruction, not when we try ↵Mike Pavone
to translate it
2013-01-05Fix decoding of movepMike Pavone
2013-01-04Small fix for bit instructionsMike Pavone
2012-12-31Fix label names in disassemblerMike Pavone
2012-12-30Fix some bugs in decoding cmpMike Pavone
2012-12-30Improve disassemblerMike Pavone
2012-12-28Fix decoding of CMPAMike Pavone
2012-12-28Implement pea (untested).Mike Pavone
2012-12-28Fix decoding of SccMike Pavone
2012-12-27Some fixes to add/addx sub/subx decodingMike Pavone
2012-12-27Initial work on allowing dynamic branches and code in RAM plus a small fix ↵Mike Pavone
to effective address decoding
2012-12-27Fix decoding bug for addq/subqMike Pavone
2012-12-27Implement EXT, add some fixes to LINK/UNLKMike Pavone
2012-12-27Fix decoding bug in addq/subqMike Pavone
2012-12-26Fix decoding of andMike Pavone
2012-12-21Implement indexed with 8-bit displacement addressing modes in decoder and ↵Mike Pavone
disassembler
2012-12-20Fix disassembly of reg list in MOVEM when the reg list is the destinationMike Pavone
2012-12-20Fix decoding and disassembly of MOVEMMike Pavone
2012-12-19Print out large immediate values in hex rather than decimal formMike Pavone
2012-12-19Add support for BTST instruction (untested), absolute addressing mode for ↵Mike Pavone
instructions other than move (untested) and fix decoding of MOVEM.
2012-12-18Fix operand order for AND instructionsMike Pavone
2012-12-18Get Flavio's color bar demo kind of sort of workingMike Pavone
2012-12-15Implement shift instructions (asl, lsl, asr, lsr). Add flags to register ↵Mike Pavone
printout. Fix minor bug in shift/rotate instruction decoding.
2012-12-13Fix shift rotate instruction decoding and improve disassembly of move USP ↵Mike Pavone
and conditional branch instructions
2012-12-12Add support for dbcc instructionMike Pavone
2012-12-04M68K to x86 translation works for a limited subset of instructions and ↵Mike Pavone
addressing modes
2012-11-27Make x86 generator generic with respect to operand size for immediate ↵Mike Pavone
parameters.
2012-11-15Improve disassembly. FIx some decoding bugs.Mike Pavone
2012-11-15Add mising bit instructions to decoder. Add test assembly file containing ↵Mike Pavone
most distinct instructions.
2012-11-14Implement OR_DIV_SBCD group in decoderMike Pavone
2012-11-14Added new OPSIZE for unsized instructions so they can be properly ↵Mike Pavone
disassembled without making them special cases
2012-11-13Implement (possibly broken) decoding of all M68000 instructions not in the ↵Mike Pavone
OR_DIV_SBCD group
2012-11-09Finish bit/movep/immediate group except for 68020 instructionsMike Pavone
2012-11-06More bit and immediate instructionsMike Pavone
2012-11-04Add support for some bit instructions and a few others in the same "category"Mike Pavone
2012-11-03Finish mulu.w, muls.w and abcd parameter decodingMike Pavone
2012-11-03Improve 68K instruction decoding. Add simple disassembler.Mike Pavone
2012-10-29Initial work on M68K instruction decodingMike Pavone
generated by cgit v1.2.3 (git 2.25.1) at 2025-06-23 17:51:07 +0000