Age | Commit message (Expand) | Author |
2013-06-19 | Fix movem with pc displacement or pc indexed source | Mike Pavone |
2013-05-12 | Fixed decoding of CHK destination | Mike Pavone |
2013-01-26 | Tweaks to make blastem compatible with m68k-tester | Mike Pavone |
2013-01-17 | Add instruction address logging to translator and support for reading an addr... | Mike Pavone |
2013-01-13 | Fix a bunch of bugs in the CPU core, add a 68K debugger | Mike Pavone |
2013-01-09 | Fix (a7)+ src when size is byte, fix trap return address, make div with areg ... | Mike Pavone |
2013-01-09 | Fix signed division with negative result, fix address reg destination with wo... | Mike Pavone |
2013-01-06 | Print a message when we try to run an invalid instruction, not when we try to... | Mike Pavone |
2013-01-05 | Fix decoding of movep | Mike Pavone |
2013-01-04 | Small fix for bit instructions | Mike Pavone |
2012-12-31 | Fix label names in disassembler | Mike Pavone |
2012-12-30 | Fix some bugs in decoding cmp | Mike Pavone |
2012-12-30 | Improve disassembler | Mike Pavone |
2012-12-28 | Fix decoding of CMPA | Mike Pavone |
2012-12-28 | Implement pea (untested). | Mike Pavone |
2012-12-28 | Fix decoding of Scc | Mike Pavone |
2012-12-27 | Some fixes to add/addx sub/subx decoding | Mike Pavone |
2012-12-27 | Initial work on allowing dynamic branches and code in RAM plus a small fix to... | Mike Pavone |
2012-12-27 | Fix decoding bug for addq/subq | Mike Pavone |
2012-12-27 | Implement EXT, add some fixes to LINK/UNLK | Mike Pavone |
2012-12-27 | Fix decoding bug in addq/subq | Mike Pavone |
2012-12-26 | Fix decoding of and | Mike Pavone |
2012-12-21 | Implement indexed with 8-bit displacement addressing modes in decoder and dis... | Mike Pavone |
2012-12-20 | Fix disassembly of reg list in MOVEM when the reg list is the destination | Mike Pavone |
2012-12-20 | Fix decoding and disassembly of MOVEM | Mike Pavone |
2012-12-19 | Print out large immediate values in hex rather than decimal form | Mike Pavone |
2012-12-19 | Add support for BTST instruction (untested), absolute addressing mode for ins... | Mike Pavone |
2012-12-18 | Fix operand order for AND instructions | Mike Pavone |
2012-12-18 | Get Flavio's color bar demo kind of sort of working | Mike Pavone |
2012-12-15 | Implement shift instructions (asl, lsl, asr, lsr). Add flags to register prin... | Mike Pavone |
2012-12-13 | Fix shift rotate instruction decoding and improve disassembly of move USP and... | Mike Pavone |
2012-12-12 | Add support for dbcc instruction | Mike Pavone |
2012-12-04 | M68K to x86 translation works for a limited subset of instructions and addres... | Mike Pavone |
2012-11-27 | Make x86 generator generic with respect to operand size for immediate paramet... | Mike Pavone |
2012-11-15 | Improve disassembly. FIx some decoding bugs. | Mike Pavone |
2012-11-15 | Add mising bit instructions to decoder. Add test assembly file containing mos... | Mike Pavone |
2012-11-14 | Implement OR_DIV_SBCD group in decoder | Mike Pavone |
2012-11-14 | Added new OPSIZE for unsized instructions so they can be properly disassemble... | Mike Pavone |
2012-11-13 | Implement (possibly broken) decoding of all M68000 instructions not in the OR... | Mike Pavone |
2012-11-09 | Finish bit/movep/immediate group except for 68020 instructions | Mike Pavone |
2012-11-06 | More bit and immediate instructions | Mike Pavone |
2012-11-04 | Add support for some bit instructions and a few others in the same "category" | Mike Pavone |
2012-11-03 | Finish mulu.w, muls.w and abcd parameter decoding | Mike Pavone |
2012-11-03 | Improve 68K instruction decoding. Add simple disassembler. | Mike Pavone |
2012-10-29 | Initial work on M68K instruction decoding | Mike Pavone |