Age | Commit message (Collapse) | Author | |
---|---|---|---|
2012-11-14 | Added new OPSIZE for unsized instructions so they can be properly ↵ | Mike Pavone | |
disassembled without making them special cases | |||
2012-11-13 | Implement (possibly broken) decoding of all M68000 instructions not in the ↵ | Mike Pavone | |
OR_DIV_SBCD group | |||
2012-11-09 | Finish bit/movep/immediate group except for 68020 instructions | Mike Pavone | |
2012-11-06 | merge | Mike Pavone | |
2012-11-06 | More bit and immediate instructions | Mike Pavone | |
2012-11-06 | Add some logic analyzer captures, a Python script for analyzing said ↵ | Mike Pavone | |
captures and a higher level analysis of the output | |||
2012-11-04 | Add support for some bit instructions and a few others in the same "category" | Mike Pavone | |
2012-11-03 | Finish mulu.w, muls.w and abcd parameter decoding | Mike Pavone | |
2012-11-03 | Improve 68K instruction decoding. Add simple disassembler. | Mike Pavone | |
2012-11-03 | Make sure all operations are long-word length on fib example. | Mike Pavone | |
2012-10-29 | Initial work on M68K instruction decoding | Mike Pavone | |