summaryrefslogtreecommitdiff
path: root/cpu_dsl.py
AgeCommit message (Collapse)Author
2019-01-28Initial stab at overflow flag implementation in CPU DSL. Probably broken for ↵Michael Pavone
subtraction
2019-01-28First stab at carry and half-carry calculation in CPU DSLMichael Pavone
2019-01-28Fix zero flag calculation in CPU DSLMichael Pavone
2019-01-27Implemented sbc instruction in CPU DSLMichael Pavone
2019-01-27Added adc instruction to CPU DSLMichael Pavone
2019-01-25Output tables in order specified by the extra_tables field so the user can ↵Michael Pavone
deal with dependencies between tables
2019-01-25Fix constant propagation to a non-ephemeral destination in CPU DSLMichael Pavone
2019-01-25Fixed missing semicolon in coalesceFlagsMichael Pavone
2019-01-25Added new sext instruction for sign extension to CPU sdlMichael Pavone
2018-10-06Implement program ROM readsMichael Pavone
2018-10-04Add the ability for a CPU definition to reference arbitrary C includes and ↵Michael Pavone
use it to add a placeholder definition of svp_read_16
2018-10-01Clean up warnings from -1 caseMichael Pavone
2018-10-01Getting SVP core closer to compilingMichael Pavone
2018-09-25Fix implementation cmp+condition version of if in CPU DSLMichael Pavone
2018-09-24Support immediate operands for ld and alu ops in SVP. Support double ↵Michael Pavone
indirect and immediate address modes for alu ops. Fixed DSL issues revealed by those changes
2018-09-21Did some cleanup of SVP code using the newly more powerful DSL if block and ↵Michael Pavone
fixed some issues in the DSL implementation that cropped up as a result
2018-09-18Initial commit of CPU DSL and a WIP SVP implementation written in that DSLMichael Pavone
generated by cgit v1.2.3 (git 2.25.1) at 2025-06-21 19:22:28 +0000