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path: root/cpu_dsl.py
AgeCommit message (Expand)Author
2020-06-13Somewhat buggy implementations of shift instructions in new 68K coreMichael Pavone
2020-04-23Fix autogenerated temp variables in interrupt subroutine in CPU DSLMichael Pavone
2019-09-21Implement interrupts in call dispatch mode in CPU DSLMichael Pavone
2019-04-18WIP new 68K core using CPU DSLMichael Pavone
2019-02-20Fix calculation for whether coalesceFlags is needed for xchg instruction in C...Michael Pavone
2019-02-19Store sync_cycle in context rather than in a local in CPU DSL. Fix the timing...Michael Pavone
2019-02-15Basic support for string operands in CPU DSLMichael Pavone
2019-02-12Integration of new Z80 core is sort of working nowMichael Pavone
2019-02-10Initial attempt at interrupts in new Z80 core and integrating it into main ex...Michael Pavone
2019-02-09Optimization to memory access in new Z80 coreMichael Pavone
2019-02-08Added option to CPU DSL to produce a threaded interpreter using computed gotoMichael Pavone
2019-02-07Added init functions to z80_util.c so new Z80 core is closer to a drop in rep...Michael Pavone
2019-02-06Optimization of flag calculation for flags that just copy a bit from the resu...Michael Pavone
2019-02-06Fixes to DAA, SCF and CCF to pass ZEXALL in new Z80 coreMichael Pavone
2019-02-05Fixed half-carry flag calcuation for adc/sbc in new Z80 coreMichael Pavone
2019-02-04Fixed CPI/CPD/CPIR/CPDR in new Z80 coreMichael Pavone
2019-02-04Implement DD/FD prefixes for instructions that don't reference HLMichael Pavone
2019-02-04Fixed some issues involving conditional execution and temporaries/constant fo...Michael Pavone
2019-02-03Get new Z80 core running in CPM harnessMichael Pavone
2019-02-03Implemented the rest of the block move instructions in new Z80 coreMichael Pavone
2019-02-02Implemented LDI in new Z80 coreMichael Pavone
2019-02-02Implemented RES instruction in new Z80 coreMichael Pavone
2019-02-01Miscellaneous small fixes to new Z80 coreMichael Pavone
2019-01-31Implemented shift instructions in new Z80 coreMichael Pavone
2019-01-31Implemented the rest of the rotate instructions in new Z80 coreMichael Pavone
2019-01-31Implementation of some of the rotate instructions in new Z80 coreMichael Pavone
2019-01-30Fix cp instruction in new Z80 core and implement its DD/FD prefixesMichael Pavone
2019-01-30Better error reporting when an instruction is given an insufficient number of...Michael Pavone
2019-01-29Implement 16-bit addition in new Z80 core along with necessary CPU DSL fixes ...Michael Pavone
2019-01-29Implement parity flag calculation typeMichael Pavone
2019-01-29Actually correct overflow flag calculation in CPU DSLMichael Pavone
2019-01-28Fix sbc and implement carry/overflow flags for it in CPU DSLMichael Pavone
2019-01-28Implementation of carry/overflow flags for adc instructions in CPU DSLMichael Pavone
2019-01-28Fixed flag calculation for sub instructions in CPU DSLMichael Pavone
2019-01-28Less broken flag calulcation for sub instructions in CPU DSLMichael Pavone
2019-01-28Initial stab at overflow flag implementation in CPU DSL. Probably broken for ...Michael Pavone
2019-01-28First stab at carry and half-carry calculation in CPU DSLMichael Pavone
2019-01-28Fix zero flag calculation in CPU DSLMichael Pavone
2019-01-27Implemented sbc instruction in CPU DSLMichael Pavone
2019-01-27Added adc instruction to CPU DSLMichael Pavone
2019-01-25Output tables in order specified by the extra_tables field so the user can de...Michael Pavone
2019-01-25Fix constant propagation to a non-ephemeral destination in CPU DSLMichael Pavone
2019-01-25Fixed missing semicolon in coalesceFlagsMichael Pavone
2019-01-25Added new sext instruction for sign extension to CPU sdlMichael Pavone
2018-10-06Implement program ROM readsMichael Pavone
2018-10-04Add the ability for a CPU definition to reference arbitrary C includes and us...Michael Pavone
2018-10-01Clean up warnings from -1 caseMichael Pavone
2018-10-01Getting SVP core closer to compilingMichael Pavone
2018-09-25Fix implementation cmp+condition version of if in CPU DSLMichael Pavone
2018-09-24Support immediate operands for ld and alu ops in SVP. Support double indirect...Michael Pavone
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