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2020-07-11Fix broken enum definitions that cause multiple definition errors when ↵Mike Pavone
building with -fno-common which is now the default in GCC 10
2019-04-07Get 64-bit builds working for Windows targetMichael Pavone
2017-09-13Preserve original address when retranslating instructions instead of ↵Michael Pavone
switching to the lowest alias
2017-02-04Cycle accurate MULU/MULS emulationMichael Pavone
2015-11-26Fix for Z80 retranslation post alignment reworkMichael Pavone
2015-01-01Fix some issues with 68K instruction retranslationMichael Pavone
2014-12-26Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. ↵Michael Pavone
Fix generation of save and load context for Z80
2014-12-22Z80 core is sort of working againMichael Pavone
2014-12-17Get Z80 core back into compileable stateMichael Pavone
2014-03-03Remove jmp_r from gen_x86.h since it got added to gen.hMichael Pavone
2014-03-02Initial stab at separating the generic parts of the 68K core from the ↵Michael Pavone
host-cpu specific parts.
2014-03-02Refactor gen_x86 to use an interface more like gen_arm and to remove the ↵Michael Pavone
need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
2014-02-19Apart from the Z80 core, BlastEm now supports 32-bit x86Michael Pavone
2013-10-03Add support for test instruction to x86 generator libraryMike Pavone
2013-09-10Added copyright notice to source files and added GPL license text in COPYINGMike Pavone
2013-06-25Move IO code to a separate file and do a tiny bit of refactoringMike Pavone
2013-05-18Mostly working runtime generation of memory map read/write functionsMike Pavone
2013-04-28Implement EX, EXX and RST in Z80 coreMike Pavone
2013-01-25Fix overflow flag on ASLMike Pavone
2013-01-03Implement MULU/MULS and DIVU/DIVSMike Pavone
2012-12-31Implement most of the "X" instructionsMike Pavone
2012-12-29Implement the rest of the bit instructionsMike Pavone
2012-12-28Implement scc (untested)Mike Pavone
2012-12-26Initial stab at interrupt support. Make native code offsets bigger so I ↵Mike Pavone
don't have to worry about overflowing the offset. Implement neg and not (untested).
2012-12-22Add support for indexed modes as a source, some work on jmp and jsr with ↵Mike Pavone
areg indirect mode
2012-12-21Implement more instructions and address modesMike Pavone
2012-12-19Add support for BTST instruction (untested), absolute addressing mode for ↵Mike Pavone
instructions other than move (untested) and fix decoding of MOVEM.
2012-12-15Implement shift instructions (asl, lsl, asr, lsr). Add flags to register ↵Mike Pavone
printout. Fix minor bug in shift/rotate instruction decoding.
2012-12-12Add untested support for and, eor, or, swap, tst and nop instructions. Add ↵Mike Pavone
call to m68k_save_result for add and sub so that they will properly save results for memory destinations
2012-12-04M68K to x86 translation works for a limited subset of instructions and ↵Mike Pavone
addressing modes
2012-11-27Make x86 generator generic with respect to operand size for immediate ↵Mike Pavone
parameters.
2012-11-27x86 code gen, initial work on translatorMike Pavone