| Age | Commit message (Expand) | Author |
|---|
| 2020-07-11 | Fix broken enum definitions that cause multiple definition errors when buildi... | Mike Pavone |
| 2019-04-07 | Get 64-bit builds working for Windows target | Michael Pavone |
| 2017-09-13 | Preserve original address when retranslating instructions instead of switchin... | Michael Pavone |
| 2017-02-04 | Cycle accurate MULU/MULS emulation | Michael Pavone |
| 2015-11-26 | Fix for Z80 retranslation post alignment rework | Michael Pavone |
| 2015-01-01 | Fix some issues with 68K instruction retranslation | Michael Pavone |
| 2014-12-26 | Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. F... | Michael Pavone |
| 2014-12-22 | Z80 core is sort of working again | Michael Pavone |
| 2014-12-17 | Get Z80 core back into compileable state | Michael Pavone |
| 2014-03-03 | Remove jmp_r from gen_x86.h since it got added to gen.h | Michael Pavone |
| 2014-03-02 | Initial stab at separating the generic parts of the 68K core from the host-cp... | Michael Pavone |
| 2014-03-02 | Refactor gen_x86 to use an interface more like gen_arm and to remove the need... | Michael Pavone |
| 2014-02-19 | Apart from the Z80 core, BlastEm now supports 32-bit x86 | Michael Pavone |
| 2013-10-03 | Add support for test instruction to x86 generator library | Mike Pavone |
| 2013-09-10 | Added copyright notice to source files and added GPL license text in COPYING | Mike Pavone |
| 2013-06-25 | Move IO code to a separate file and do a tiny bit of refactoring | Mike Pavone |
| 2013-05-18 | Mostly working runtime generation of memory map read/write functions | Mike Pavone |
| 2013-04-28 | Implement EX, EXX and RST in Z80 core | Mike Pavone |
| 2013-01-25 | Fix overflow flag on ASL | Mike Pavone |
| 2013-01-03 | Implement MULU/MULS and DIVU/DIVS | Mike Pavone |
| 2012-12-31 | Implement most of the "X" instructions | Mike Pavone |
| 2012-12-29 | Implement the rest of the bit instructions | Mike Pavone |
| 2012-12-28 | Implement scc (untested) | Mike Pavone |
| 2012-12-26 | Initial stab at interrupt support. Make native code offsets bigger so I don't... | Mike Pavone |
| 2012-12-22 | Add support for indexed modes as a source, some work on jmp and jsr with areg... | Mike Pavone |
| 2012-12-21 | Implement more instructions and address modes | Mike Pavone |
| 2012-12-19 | Add support for BTST instruction (untested), absolute addressing mode for ins... | Mike Pavone |
| 2012-12-15 | Implement shift instructions (asl, lsl, asr, lsr). Add flags to register prin... | Mike Pavone |
| 2012-12-12 | Add untested support for and, eor, or, swap, tst and nop instructions. Add ca... | Mike Pavone |
| 2012-12-04 | M68K to x86 translation works for a limited subset of instructions and addres... | Mike Pavone |
| 2012-11-27 | Make x86 generator generic with respect to operand size for immediate paramet... | Mike Pavone |
| 2012-11-27 | x86 code gen, initial work on translator | Mike Pavone |
