blastem.git - Oxore's fork of "blastem" emulator for ROM hacking (C)

Age	Commit message (Collapse)	Author
2013-01-26	Tweaks to make blastem compatible with m68k-tester	Mike Pavone

2013-01-25	Fix overflow flag on ASL	Mike Pavone

2013-01-17	Add instruction address logging to translator and support for reading an ↵	Mike Pavone
	address log to the disassembler
2013-01-17	Implement pc indexed mode as move dst	Mike Pavone

2013-01-16	Implement ABCD an SBCD. Fix BTEST with register source.	Mike Pavone

2013-01-15	Implement support for self-modifying code	Mike Pavone

2013-01-14	Prep work for handling games that modify code in RAM	Mike Pavone

2013-01-13	Fix movem.w when dest is register list	Mike Pavone

2013-01-13	Fix return address for areg displacement mode JSR	Mike Pavone

2013-01-13	Fix a bunch of bugs in the CPU core, add a 68K debugger	Mike Pavone

2013-01-09	Fix (a7)+ src when size is byte, fix trap return address, make div with areg ↵	Mike Pavone
	src decoded to invalid
2013-01-09	Fix -(a7) dest when size is byte	Mike Pavone

2013-01-09	Fix signed division with negative result, fix address reg destination with ↵	Mike Pavone
	word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions
2013-01-08	Fix scc to set reg to 0xFF rather than 1 when the condition is true	Mike Pavone

2013-01-06	Fix order of reading saved pc and swapping user and system stack pointers	Mike Pavone

2013-01-06	Make sure we bail out of translation after translating an invalid instruction	Mike Pavone

2013-01-06	Print a message when we try to run an invalid instruction, not when we try ↵	Mike Pavone
	to translate it
2013-01-06	Fix order of SR and PC saved in an exception stack frame	Mike Pavone

2013-01-06	Implement areg displacement mode for jsr	Mike Pavone

2013-01-06	Implement negx	Mike Pavone

2013-01-06	Implement movep	Mike Pavone

2013-01-06	Implement EORI CCR/SR	Mike Pavone

2013-01-06	Implement RTR	Mike Pavone

2013-01-06	Fix a bunch of addressing modes in movem when a register list is the destination	Mike Pavone

2013-01-06	Minor optimization and a cycle count fix to lea	Mike Pavone

2013-01-06	Initialize status register to proper value on startup	Mike Pavone

2013-01-05	Fix certain address modes with lea when the destination is not a native register	Mike Pavone

2013-01-05	Implement more movem modes src	Mike Pavone

2013-01-05	Implement more address modes for movem dst and fix a missing break statement ↵	Mike Pavone
	in translate_m68k_dst
2013-01-05	FIx movem when src is reg list and dst is not a areg predec mode	Mike Pavone

2013-01-05	Fix predec address mode when used as source	Mike Pavone

2013-01-04	Fix rotate instructions that use a register source. Fix ROXL/ROXR to ↵	Mike Pavone
	actually use the appropriate x86 instruction.
2013-01-04	Add cycles for Bcc (needs work, but this changes keeps some ROMs from making ↵	Mike Pavone
	the emulator unresponsive)
2013-01-04	Don't use the native call stack for M68K calls by default	Mike Pavone

2013-01-04	Small fix for bit instructions	Mike Pavone

2013-01-03	Implement TRAP (untested)	Mike Pavone

2013-01-03	Implement MULU/MULS and DIVU/DIVS	Mike Pavone

2013-01-01	Do a sync when interrupt mask changes so we can recompute the next interrupt ↵	Mike Pavone
	cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
2012-12-31	Implement most of the "X" instructions	Mike Pavone

2012-12-30	Add support for pc indexed addressing mode to lea	Mike Pavone

2012-12-30	Support more address modes for jmp	Mike Pavone

2012-12-29	Fix swap	Mike Pavone

2012-12-29	Cleanup bit instructions and fix bug in translate_m68k_move that caused ↵	Mike Pavone
	incorrect results once translate_m68k_src was fixed
2012-12-29	Fix check in translate_m68k_src that deals with instructions for which both ↵	Mike Pavone
	operands are registers that are not mapped to a native x86-64 register
2012-12-29	Fix encoding of movsx instruction when used with new (i.e. r9-r15) ↵	Mike Pavone
	registers. This fixes the indexed addressing modes when used with a word-wide index register
2012-12-29	Some fixes for translating code in located in RAM	Mike Pavone

2012-12-29	Implement the rest of the bit instructions	Mike Pavone

2012-12-29	Implemented ROL and ROR	Mike Pavone

2012-12-29	Fix logic for switching between USP and SSP	Mike Pavone

2012-12-28	Fix return address pushed to stack for jsr	Mike Pavone