Age | Commit message (Expand) | Author |
2012-12-28 | Implement pea (untested). | Mike Pavone |
2012-12-28 | Defer the correct address for pc relative jsr/jmp | Mike Pavone |
2012-12-28 | Implement scc (untested) | Mike Pavone |
2012-12-28 | Implement more address modes for jsr | Mike Pavone |
2012-12-28 | Fix areg indexed mode for move dst | Mike Pavone |
2012-12-28 | Implement ORI to CCR/SR | Mike Pavone |
2012-12-28 | Implemented move from SR | Mike Pavone |
2012-12-27 | Use unsigned comparisons for address decoding, exit when we hit an unhandled ... | Mike Pavone |
2012-12-27 | allocate a new native code chunk when we run out of space | Mike Pavone |
2012-12-27 | Implement areg indexed mode for lea | Mike Pavone |
2012-12-27 | Allow use of indexed modes as move dst | Mike Pavone |
2012-12-27 | Allow indexed modes to be used as a destination | Mike Pavone |
2012-12-27 | Fix address register indexed addressing (probably) | Mike Pavone |
2012-12-27 | Fix pc indexed addressing (probably) when used as a source | Mike Pavone |
2012-12-27 | Initial work on allowing dynamic branches and code in RAM plus a small fix to... | Mike Pavone |
2012-12-27 | Implement EXT, add some fixes to LINK/UNLK | Mike Pavone |
2012-12-27 | Fix some bugs in emulation of CLR | Mike Pavone |
2012-12-26 | vertical interrupts now work | Mike Pavone |
2012-12-26 | RTE doesn't crash the emulator anymore | Mike Pavone |
2012-12-26 | Initial stab at interrupt support. Make native code offsets bigger so I don't... | Mike Pavone |
2012-12-22 | Add support for indexed modes as a source, some work on jmp and jsr with areg... | Mike Pavone |
2012-12-21 | Added untested support for LINK and UNLK | Mike Pavone |
2012-12-21 | Removed some old debug printfs | Mike Pavone |
2012-12-21 | Implement JSR for some addressing modes | Mike Pavone |
2012-12-21 | Fix some bugs in movem with a register list destination | Mike Pavone |
2012-12-21 | Implement a couple of supervisor instructions | Mike Pavone |
2012-12-21 | Implement more instructions and address modes | Mike Pavone |
2012-12-20 | Make the translator bail out if it hits an instruction I haven't implemented yet | Mike Pavone |
2012-12-20 | Fix BTST | Mike Pavone |
2012-12-20 | Gamepad support | Mike Pavone |
2012-12-19 | Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causin... | Mike Pavone |
2012-12-19 | Add support for BTST instruction (untested), absolute addressing mode for ins... | Mike Pavone |
2012-12-18 | ecx was getting clobbered before the relevant temp value was used in some cas... | Mike Pavone |
2012-12-18 | Get Flavio's color bar demo kind of sort of working | Mike Pavone |
2012-12-16 | Add preliminary support for JMP | Mike Pavone |
2012-12-16 | Implement CLR, minor refactor of register offset calculation in context struct | Mike Pavone |
2012-12-15 | Implement shift instructions (asl, lsl, asr, lsr). Add flags to register prin... | Mike Pavone |
2012-12-12 | Add untested support for and, eor, or, swap, tst and nop instructions. Add ca... | Mike Pavone |
2012-12-12 | Add support for dbcc instruction | Mike Pavone |
2012-12-04 | Initial support for M68k reset vector, rather than starting at an arbitrary a... | Mike Pavone |
2012-12-04 | M68K to x86 translation works for a limited subset of instructions and addres... | Mike Pavone |
2012-11-27 | x86 code gen, initial work on translator | Mike Pavone |