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path: root/vdp.h
AgeCommit message (Collapse)Author
2018-12-27Optimized render_map_output a bitMichael Pavone
2018-12-18Allow closing VDP debug windows with the close button in the window title barMichael Pavone
2018-11-19Removed old VDP debug functionalityMichael Pavone
2018-11-19Basic version of layer compositing debug view in a separate windowMichael Pavone
2018-11-16Small cleanup of vdp_context struct layout and removal of separately ↵Michael Pavone
allocated buffers
2018-11-14Initial stab at CRAM debug in a detached windowMichael Pavone
2018-11-04WIP new VDP plane debug view and support for detached VDP debug views generallyMichael Pavone
2018-11-01Forcefully update the display when entering the 68K debugger so you can see ↵Michael Pavone
it update in realtime as you step through the code
2017-08-21Fix timing of VDP ODD flag toggleMichael Pavone
2017-08-09New savestates are working. New config file option for selecting format ↵Michael Pavone
states will be saved in. Mostly complete, needs a little more work before release
2017-08-06WIP - New savestate formatMichael Pavone
2017-06-15Properly release and reacquire framebuffer pointer when switching contexts. ↵Michael Pavone
Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
2017-05-28Implemented SMS pause buttonMichael Pavone
2017-05-23Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of ↵Michael Pavone
system instead. Worse results on CRAM dot issue, but much less of a hack
2017-05-04Fix transition from active to inactive displayMichael Pavone
2017-05-03Implement the effect of VDP test register usage on the top and bottom ↵Michael Pavone
borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
2017-04-27Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on ↵Michael Pavone
hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
2017-04-26Small tweak to how SAT cache updates are done. Mostly fixes the rotating ↵Michael Pavone
cube scene in Overdrive 2
2017-04-21Fairly major rework of how active/passive is handled along with how the V30 ↵Michael Pavone
mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
2017-04-18Initial stab at implementing the output disable/layer selection bits of the ↵Michael Pavone
VDP test register
2017-04-16Initial work on handling the 128KB VRAM mode bit and some basic prep work ↵Michael Pavone
for VDP test register support
2017-03-06Initial stab at horizontal border emulation. Only works for H40 and still ↵Michael Pavone
has a few minor holes to fill
2017-01-15Initial work on emulating top and bottom border areaMichael Pavone
2017-01-05Implemented Mode 4 H conter latchingMichael Pavone
2017-01-04Don't lock up CPU if performing a read with writes configured when in PBC ↵Michael Pavone
mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
2017-01-01Update Mode 4 rendering to match logic analyzer capturesMichael Pavone
2016-12-27Somewhat broken implementation of Mode 4Michael Pavone
2016-12-22Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be ↵Michael Pavone
useful.
2016-11-28Clean up symbol visiblity and delete a ltitle bit of dead codeMichael Pavone
2016-08-22Cleanup the separation of render backend and VDP code in preparation for ↵Michael Pavone
having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
2016-05-02Fix GST savestate loading to deal with SAT cache to fix sprite corruption on ↵Michael Pavone
savestate load. Clear out Z80 native_pc so the Z80 state does not get hosed when loading a savestate while the emulator is already running
2016-04-30Implement SAT cache. Causes some graphical corruption in Overdrive due to an ↵Michael Pavone
unrelated bug.
2016-04-24Implemented VDP read prefetch and made DMA copy not use the FIFO any more. ↵Michael Pavone
Now up to 114 out of 122 passing on VDP FIFO Test ROM
2016-04-12Remove the int number argument to vdp_int_ack since it is no longer usedMichael Pavone
2016-01-28Shift slot number to slot behavior mapping by six slots in H40 mode. This ↵Michael Pavone
makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
2015-11-13Selecting a second game from the menu now worksMichael Pavone
2015-05-21Restore the other 2 debug display modesMichael Pavone
2015-05-19Small correction to VBLANK flag timing. Fixed some inconsistencies in ↵Michael Pavone
interrupt timing calculation.
2015-05-16First pass at emulating a vscroll latch. Titan's Overdrive demo seems to ↵Michael Pavone
depend on the scroll value being latched early in the line before the HINT gets a chance to change it
2015-05-11Sync fixes and logging to fix more sync issuesMichael Pavone
2015-01-04Some small synchronization improvements that do not seem to fix anythingMichael Pavone
2014-06-18Fix most of the breakage caused by the vcounter/hcounter changesMichael Pavone
2014-06-17Partially working switch to having a vcounter and hslot counter in the ↵Michael Pavone
context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
2013-10-07Initial implementation of sprite overflow and sprite collision status ↵Mike Pavone
register flags
2013-09-17Implement HV counter latchMike Pavone
2013-09-17Fix DMA fill so that it does not cause observable changes to the FIFO. Get ↵Mike Pavone
DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
2013-09-15Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM ↵Mike Pavone
and VSRAM bits can be implemented properly
2013-09-13Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial ↵Mike Pavone
stab at handling undefined bits of VSRAM and CRAM.
2013-09-10Added copyright notice to source files and added GPL license text in COPYINGMike Pavone
2013-09-10Implement FIFO latency and improve DMA accuracyMike Pavone
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