blastem.git - Oxore's fork of "blastem" emulator for ROM hacking (C)

Age	Commit message (Collapse)	Author
2013-06-29	Add support for loading GST format savestates	Mike Pavone

2013-06-24	Fix access to int_enable_cycle in EI	Mike Pavone

2013-06-15	Fix DI	Mike Pavone

2013-06-14	Fix adc and sbc	Mike Pavone

2013-06-13	Fix LDIR	Mike Pavone

2013-06-11	Bail out on attempt to run code from bank area until it is properly supported	Mike Pavone

2013-06-08	Use a call instruction to figure out the original native address when ↵	Mike Pavone
	retranslating so that it does not get lost when the byte transforms from a instruction word to extension word
2013-06-06	Removed out of date TODO	Mike Pavone

2013-06-06	Fix LDD and LDDR	Mike Pavone

2013-06-05	Fix dec and inc when the operand is in memory	Mike Pavone

2013-06-05	Fix LDI	Mike Pavone

2013-06-04	Fix set/res when the operand is in memory	Mike Pavone

2013-06-02	Fix cycle count for inc and dec	Mike Pavone

2013-06-02	Bunch of Z80 debugger improvements	Mike Pavone

2013-05-31	Fix P condition in Z80 core	Mike Pavone

2013-05-31	Partial implementation of Z80 debugger	Mike Pavone

2013-05-29	Fix push AF	Mike Pavone

2013-05-27	Fix sizeof expression passed to malloc in z80_init to avoid a minor memory error	Mike Pavone

2013-05-14	Some Z80 interrupt fixes	Mike Pavone

2013-05-09	Fix return address for RST	Mike Pavone

2013-05-09	Show absolute addresses for JR, JRCC and DJNZ in Z80 disassembler	Mike Pavone

2013-05-09	Fix terminal instruction detection in disassembler	Mike Pavone

2013-05-09	Properly handle instructions that use boty IYH and IYL	Mike Pavone

2013-05-09	Set the N flag to the correct value for DEC instructions	Mike Pavone

2013-05-09	Implement carry flag for shift instructions. Implement weird behavior for ↵	Mike Pavone
	bit 0 of SLL. Fix missing break statement in SRL.
2013-05-09	Correctly set the N flag for SBC	Mike Pavone

2013-05-09	Deal with the fact that there's no 8-bit version of the BT family of ↵	Mike Pavone
	instructions on x86
2013-05-08	Complete flag behavior for Z80 BIT instruction	Mike Pavone

2013-05-08	Properly handle negative displacements in Z80 core	Mike Pavone

2013-05-08	Contrary to the official documenation, OR and AND also set PV based on ↵	Mike Pavone
	parity instead of overflow
2013-05-08	Set PV flag based on parity, not overflow for XOR	Mike Pavone

2013-05-08	BIT was setting the zero flag to the opposite of what it should have. This ↵	Mike Pavone
	is now fixed.
2013-05-08	More fixes for confusion between Z80_UNUSED and MODE_UNUSED	Mike Pavone

2013-05-08	Compare src_op.mode with the correct constant in shift/rotate instructions	Mike Pavone

2013-05-08	Fix IX/IY register selection when the direction bit is set	Mike Pavone

2013-05-08	Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the ↵	Mike Pavone
	IX/IY bit/shift/rotate instructions.
2013-05-08	Fix stupid copy-pasta bug in XOR	Mike Pavone

2013-05-08	Fix byte order of pop AF	Mike Pavone

2013-05-08	Added z80 test generator and z80 test runner.	Mike Pavone

2013-05-05	Implement RRD and implement flags on RLD	Mike Pavone

2013-05-04	Implemente RLD	Mike Pavone

2013-05-04	Implement HALT (sort of tested)	Mike Pavone

2013-05-04	Implement IN and OUT (untested)	Mike Pavone

2013-05-04	Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.	Mike Pavone

2013-05-04	Remove deferred address entries from abandoned translations inside ↵	Mike Pavone
	z80_retrans_inst
2013-05-03	Fix native address lookup in bannked memory area	Mike Pavone

2013-05-03	Using push/pop inside translated code is not compatible with the current way ↵	Mike Pavone
	the Z80 core returns to the caller
2013-05-03	Implement shift instructions (untested)	Mike Pavone

2013-05-02	Implement CPL and NEG (untested)	Mike Pavone

2013-05-02	Implement LDD and LDDR	Mike Pavone