From 36bc20670e8912e3903cf813a34bdfdc05e52e08 Mon Sep 17 00:00:00 2001 From: Michael Pavone Date: Tue, 25 Sep 2018 09:36:00 -0700 Subject: Add missing end in svp_ram_read. Fix alu_ram_indirect --- svp.cpu | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/svp.cpu b/svp.cpu index 8bd7d40..49ad366 100644 --- a/svp.cpu +++ b/svp.cpu @@ -103,6 +103,7 @@ svp_ram_read else sub 1 reg reg end + end and 255 idx idx meta val bank.idx @@ -270,9 +271,9 @@ PPP0101B0000MMRR alu_ram_indirect invalid P 0 invalid P 2 svp_ram_read M B R - svp_prog_ram_read scratch1 + svp_prog_ram_read val local tmp 32 - lsl val 16 tmp + lsl scratch1 16 tmp switch P case 1 -- cgit v1.2.3