From 16e7b59467ba17034f63834962e5d326a8facce4 Mon Sep 17 00:00:00 2001 From: Michael Pavone Date: Sun, 2 Mar 2014 14:45:36 -0800 Subject: Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process --- backend_x86.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 backend_x86.c (limited to 'backend_x86.c') diff --git a/backend_x86.c b/backend_x86.c new file mode 100644 index 0000000..366ab4d --- /dev/null +++ b/backend_x86.c @@ -0,0 +1,29 @@ +#include "backend.h" +#include "gen_x86.h" + +void cycles(cpu_options *opts, uint32_t num) +{ + add_ir(&opts->code, num, opts->cycles, SZ_D); +} + +void check_cycles_int(cpu_options *opts, uint32_t address) +{ + code_info *code = &opts->code; + cmp_rr(code, opts->cycles, opts->limit, SZ_D); + code_ptr jmp_off = code->cur+1; + jcc(code, CC_NC, jmp_off+1); + mov_ir(code, address, opts->scratch1, SZ_D); + call(code, opts->handle_cycle_limit_int); + *jmp_off = code->cur - (jmp_off+1); +} + +void check_cycles(cpu_options * opts) +{ + code_info *code = &opts->code; + cmp_rr(code, opts->cycles, opts->limit, SZ_D); + check_alloc_code(code, MAX_INST_LEN*2); + code_ptr jmp_off = code->cur+1; + jcc(code, CC_NC, jmp_off+1); + call(code, opts->handle_cycle_limit); + *jmp_off = code->cur - (jmp_off+1); +} -- cgit v1.2.3