From e04f6e836f9a1a5e8a249b2f9b9717752668f262 Mon Sep 17 00:00:00 2001 From: Mike Pavone Date: Sun, 19 May 2013 13:47:47 -0700 Subject: Don't sync the 68K clock to the VDP clock unless the 68K had to wait for the VDP. This unfortunately breaks the direct color DMA demos, but should be more correct overall. --- blastem.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'blastem.c') diff --git a/blastem.c b/blastem.c index 49b180c..33739e6 100644 --- a/blastem.c +++ b/blastem.c @@ -253,8 +253,8 @@ m68k_context * vdp_port_write(uint32_t vdp_port, m68k_context * context, uint16_ vdp_context * v_context = context->video_context; if (vdp_port < 0x10) { int blocked; + uint32_t before_cycle = v_context->cycles; if (vdp_port < 4) { - uint32_t before_cycle = v_context->cycles; while (vdp_data_port_write(v_context, value) < 0) { while(v_context->flags & FLAG_DMA_RUN) { vdp_run_dma_done(v_context, mclks_per_frame); @@ -314,7 +314,9 @@ m68k_context * vdp_port_write(uint32_t vdp_port, m68k_context * context, uint16_ printf("Illegal write to HV Counter port %X\n", vdp_port); exit(1); } - context->current_cycle = v_context->cycles/MCLKS_PER_68K; + if (v_context->cycles != before_cycle) { + context->current_cycle = v_context->cycles / MCLKS_PER_68K; + } } else if (vdp_port < 0x18) { //TODO: Implement PSG } else { -- cgit v1.2.3