From ebca48ed21ecee3f76644d740f49074b72a52955 Mon Sep 17 00:00:00 2001
From: Michael Pavone <pavone@retrodev.com>
Date: Sat, 13 Jun 2020 00:37:22 -0700
Subject: Somewhat buggy implementations of shift instructions in new 68K core

---
 cpu_dsl.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'cpu_dsl.py')

diff --git a/cpu_dsl.py b/cpu_dsl.py
index f58749c..44e08fe 100755
--- a/cpu_dsl.py
+++ b/cpu_dsl.py
@@ -899,7 +899,7 @@ class NormalOp:
 			else:
 				param = parent.resolveLocal(param) or param
 				if param in fieldVals:
-					param = fieldVals[index]
+					param = fieldVals[param]
 			prog.meta[self.params[0]] = param
 		elif self.op == 'dis':
 			#TODO: Disassembler
-- 
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