From cb9bb8ef62376458074f2ca519888209783d5181 Mon Sep 17 00:00:00 2001 From: Mike Pavone Date: Sun, 6 Jan 2013 18:31:17 -0800 Subject: Implement areg displacement mode for jsr --- m68k_to_x86.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'm68k_to_x86.c') diff --git a/m68k_to_x86.c b/m68k_to_x86.c index 1be0bef..2a63ddb 100644 --- a/m68k_to_x86.c +++ b/m68k_to_x86.c @@ -1945,6 +1945,30 @@ uint8_t * translate_m68k_jsr(uint8_t * dst, m68kinst * inst, x86_68k_options * o dst = jmp_r(dst, SCRATCH1); } break; + case MODE_AREG_DISPLACE: + dst = cycles(dst, BUS*2); + dst = mov_ir(dst, inst->address + 2, SCRATCH1, SZ_D); + if (opts->flags & OPT_NATIVE_CALL_STACK) { + dst = push_r(dst, SCRATCH1); + } + dst = sub_ir(dst, 4, opts->aregs[7], SZ_D); + dst = mov_rr(dst, opts->aregs[7], SCRATCH2, SZ_D); + dst = call(dst, (char *)m68k_write_long_highfirst); + if (opts->aregs[inst->src.params.regs.pri] >= 0) { + dst = mov_rr(dst, opts->aregs[inst->src.params.regs.pri], SCRATCH1, SZ_D); + } else { + dst = mov_rdisp8r(dst, CONTEXT, offsetof(m68k_context, aregs) + 4 * inst->src.params.regs.pri, SCRATCH1, SZ_D); + } + dst = add_ir(dst, inst->src.params.regs.displacement, SCRATCH1, SZ_D); + dst = call(dst, (uint8_t *)m68k_native_addr); + if (opts->flags & OPT_NATIVE_CALL_STACK) { + dst = call_r(dst, SCRATCH1); + //would add_ir(dst, 8, RSP, SZ_Q) be faster here? + dst = pop_r(dst, SCRATCH1); + } else { + dst = jmp_r(dst, SCRATCH1); + } + break; case MODE_AREG_INDEX_DISP8: dst = cycles(dst, BUS*3);//TODO: CHeck that this is correct dst = mov_ir(dst, inst->address + 4, SCRATCH1, SZ_D); -- cgit v1.2.3