From 6817ef558d165b50a9b08a337dd93c4f1f46304e Mon Sep 17 00:00:00 2001 From: Michael Pavone Date: Tue, 26 May 2015 22:22:30 -0700 Subject: Fix register to operator mapping for channel 3 special mode --- ym2612.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'ym2612.c') diff --git a/ym2612.c b/ym2612.c index 2d3404a..cc2fd01 100644 --- a/ym2612.c +++ b/ym2612.c @@ -585,14 +585,16 @@ void ym_update_phase_inc(ym2612_context * context, ym_operator * operator, uint3 ym_channel * channel = context->channels + chan_num; uint32_t inc, detune; if (chan_num == 2 && context->ch3_mode && (op < (2*4 + 3))) { - inc = context->ch3_supp[op-2*4].fnum; - if (!context->ch3_supp[op-2*4].block) { + //supplemental fnum registers are in a different order than normal slot paramters + int index = (op-2*4) ^ 2; + inc = context->ch3_supp[index].fnum; + if (!context->ch3_supp[index].block) { inc >>= 1; } else { - inc <<= (context->ch3_supp[op-2*4].block-1); + inc <<= (context->ch3_supp[index].block-1); } //detune - detune = detune_table[context->ch3_supp[op-2*4].keycode][operator->detune & 0x3]; + detune = detune_table[context->ch3_supp[index].keycode][operator->detune & 0x3]; } else { inc = channel->fnum; if (!channel->block) { -- cgit v1.2.3