From 1702ce6ce430a66bb7af51644b91b7c196e719d9 Mon Sep 17 00:00:00 2001 From: Alexander Date: Wed, 29 Jun 2022 11:03:02 +0300 Subject: =?UTF-8?q?=D0=A1=D0=BE=D0=B7=D0=B4=D0=B0=D1=8E=20=D0=BD=D0=BE?= =?UTF-8?q?=D0=B2=D1=8B=D0=B9=20=D1=80=D0=B5=D0=BF=D0=BE=D0=B7=D0=B8=D1=82?= =?UTF-8?q?=D0=BE=D1=80=D0=B8=D0=B9.=20=D0=9F=D1=80=D0=BE=D0=B3=D1=80?= =?UTF-8?q?=D0=B0=D0=BC=D0=BC=D0=B0=20=D0=B4=D0=BB=D1=8F=20=D0=B2=D0=B5?= =?UTF-8?q?=D1=80=D1=81=D0=B8=D0=B8=20NixieClock=5Fv2.=20=D0=A0=D0=B0?= =?UTF-8?q?=D0=B1=D0=BE=D1=82=D0=B0=D0=B5=D1=82,=20=D1=87=D0=B0=D1=81?= =?UTF-8?q?=D1=8B=20=D1=82=D0=B8=D0=BA=D0=B0=D1=8E=D1=82.=20=D0=95=D1=81?= =?UTF-8?q?=D1=82=D1=8C=20=D0=BF=D1=80=D0=BE=D0=B1=D0=BB=D0=B5=D0=BC=D0=B0?= =?UTF-8?q?,=20=D1=87=D1=82=D0=BE=20=D1=81=D0=BA=D0=B0=D1=87=D0=B5=D1=82?= =?UTF-8?q?=20=D0=B2=D1=82=D0=BE=D1=80=D0=B0=D1=8F=20=D1=81=D0=B5=D0=BD?= =?UTF-8?q?=D0=BE=D1=81=D1=80=D0=BD=D0=B0=D1=8F=20=D0=BA=D0=BD=D0=BE=D0=BF?= =?UTF-8?q?=D0=BA=D0=B0=20(=D0=BE=D0=BD=D0=B0=20=D0=B2=20=D0=B4=D1=80?= =?UTF-8?q?=D1=83=D0=B3=D0=BE=D0=BC=20=D0=BA=D0=B0=D0=BD=D0=B0=D0=BB=D0=B5?= =?UTF-8?q?).=20=D0=9F=D0=BE=D1=8D=D1=82=D0=BE=D0=BC=D1=83=20=D0=BD=D0=B0?= =?UTF-8?q?=20=D0=BD=D0=B5=D0=B5=20=D1=81=D0=BE=D0=B1=D0=B8=D1=80=D0=B0?= =?UTF-8?q?=D1=8E=D1=81=D1=8C=20=D1=81=D0=B4=D0=B5=D0=BB=D0=B0=D1=82=D1=8C?= =?UTF-8?q?=20=D0=B0=D0=BD=D1=82=D0=B8=D0=B4=D1=80=D0=B5=D0=B1=D0=B5=D0=B7?= =?UTF-8?q?=D0=B3.?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- Libraries/LTimers/ltimers_config.c | 82 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) create mode 100644 Libraries/LTimers/ltimers_config.c (limited to 'Libraries/LTimers/ltimers_config.c') diff --git a/Libraries/LTimers/ltimers_config.c b/Libraries/LTimers/ltimers_config.c new file mode 100644 index 0000000..069a6ca --- /dev/null +++ b/Libraries/LTimers/ltimers_config.c @@ -0,0 +1,82 @@ +#include "ltimers_config.h" + +#include "stm32f0xx_conf.h" + + +// ---------------------------------------------------------------------------- +// Инициализация аппаратного таймера для генерирования прерываний каждую 1мс +// ---------------------------------------------------------------------------- +void LTimersConfig ( void ) +{ +// NVIC_InitTypeDef NVIC_InitStructure; +// TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; +// +// /* TIM6 clock enable */ +// RCC_APB1PeriphClockCmd ( RCC_APB1Periph_TIM6 , ENABLE ); +// +// /* Enable the TIM6 global Interrupt */ +// NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; +// NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; +// NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; +// NVIC_InitStructure.NVIC_IRQChannel = TIM6_IRQn; +// NVIC_Init ( &NVIC_InitStructure ); +// +// /* Configure TIM6 to generate interrupt each 1ms */ +// TIM_TimeBaseStructure.TIM_Period = 1000; +// TIM_TimeBaseStructure.TIM_Prescaler = (SystemCoreClock/1000000)-1; +// TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1; +// TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; +// TIM_TimeBaseInit ( TIM6, &TIM_TimeBaseStructure ); +// +// /* TIM6 IT enable */ +// TIM_ITConfig ( TIM6, TIM_IT_Update , ENABLE ); +// +// /* TIM6 enable counter */ +// TIM_Cmd ( TIM6, ENABLE ); + + NVIC_InitTypeDef NVIC_InitStructure; + TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; + + /* LTIMER_TIMx clock enable */ + LTIMER_RCC_APBxPeriphClockCmd ( LTIMER_TIM_RCC, ENABLE ); + + /* Enable the LTIMER_TIMx gloabal Interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = LTIMER_TIM_IRQx; + NVIC_InitStructure.NVIC_IRQChannelPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init ( &NVIC_InitStructure ); + + /* ----------------------------------------------------------------------- + In this example TIM7 counter clock (TIM7CLK) is set to APB1 clock (PCLK1), since + APB1 prescaler is set to 1 and TIM7 prescaler is set to 0. + + In this example TIM7 input clock (TIM7CLK) is set to APB1 clock (PCLK1), + since APB1 prescaler is set to 1. + TIM7CLK = PCLK1 = HCLK = SystemCoreClock + + With Prescaler set to 479 and Period to 24999, the TIM7 counter is updated each 250 ms + (i.e. and interrupt is generated each 250 ms) + TIM7 counter clock = TIM7CLK /((Prescaler + 1)*(Period + 1)) + = 48 MHz / ((25000)*(480)) + = 4 Hz + ==> TIM7 counter period = 250 ms + + Note: + SystemCoreClock variable holds HCLK frequency and is defined in system_stm32f0xx.c file. + Each time the core clock (HCLK) changes, user had to call SystemCoreClockUpdate() + function to update SystemCoreClock variable value. Otherwise, any configuration + based on this variable will be incorrect. + ----------------------------------------------------------------------- */ + /* Time base configuration */ + TIM_TimeBaseStructure.TIM_Period = 1000; //24999; + TIM_TimeBaseStructure.TIM_Prescaler = (SystemCoreClock/1000000)-1; //479; + TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1; + TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; + TIM_TimeBaseInit ( LTIMER_TIMx, &TIM_TimeBaseStructure ); + + /* LTIMER_TIMx Interrupts enable */ + TIM_ITConfig ( LTIMER_TIMx, TIM_IT_Update, ENABLE ); + + /* LTIMER_TIMx enable counter */ + TIM_Cmd ( LTIMER_TIMx, ENABLE ); +} -- cgit v1.2.3