From 1702ce6ce430a66bb7af51644b91b7c196e719d9 Mon Sep 17 00:00:00 2001 From: Alexander Date: Wed, 29 Jun 2022 11:03:02 +0300 Subject: =?UTF-8?q?=D0=A1=D0=BE=D0=B7=D0=B4=D0=B0=D1=8E=20=D0=BD=D0=BE?= =?UTF-8?q?=D0=B2=D1=8B=D0=B9=20=D1=80=D0=B5=D0=BF=D0=BE=D0=B7=D0=B8=D1=82?= =?UTF-8?q?=D0=BE=D1=80=D0=B8=D0=B9.=20=D0=9F=D1=80=D0=BE=D0=B3=D1=80?= =?UTF-8?q?=D0=B0=D0=BC=D0=BC=D0=B0=20=D0=B4=D0=BB=D1=8F=20=D0=B2=D0=B5?= =?UTF-8?q?=D1=80=D1=81=D0=B8=D0=B8=20NixieClock=5Fv2.=20=D0=A0=D0=B0?= =?UTF-8?q?=D0=B1=D0=BE=D1=82=D0=B0=D0=B5=D1=82,=20=D1=87=D0=B0=D1=81?= =?UTF-8?q?=D1=8B=20=D1=82=D0=B8=D0=BA=D0=B0=D1=8E=D1=82.=20=D0=95=D1=81?= =?UTF-8?q?=D1=82=D1=8C=20=D0=BF=D1=80=D0=BE=D0=B1=D0=BB=D0=B5=D0=BC=D0=B0?= =?UTF-8?q?,=20=D1=87=D1=82=D0=BE=20=D1=81=D0=BA=D0=B0=D1=87=D0=B5=D1=82?= =?UTF-8?q?=20=D0=B2=D1=82=D0=BE=D1=80=D0=B0=D1=8F=20=D1=81=D0=B5=D0=BD?= =?UTF-8?q?=D0=BE=D1=81=D1=80=D0=BD=D0=B0=D1=8F=20=D0=BA=D0=BD=D0=BE=D0=BF?= =?UTF-8?q?=D0=BA=D0=B0=20(=D0=BE=D0=BD=D0=B0=20=D0=B2=20=D0=B4=D1=80?= =?UTF-8?q?=D1=83=D0=B3=D0=BE=D0=BC=20=D0=BA=D0=B0=D0=BD=D0=B0=D0=BB=D0=B5?= =?UTF-8?q?).=20=D0=9F=D0=BE=D1=8D=D1=82=D0=BE=D0=BC=D1=83=20=D0=BD=D0=B0?= =?UTF-8?q?=20=D0=BD=D0=B5=D0=B5=20=D1=81=D0=BE=D0=B1=D0=B8=D1=80=D0=B0?= =?UTF-8?q?=D1=8E=D1=81=D1=8C=20=D1=81=D0=B4=D0=B5=D0=BB=D0=B0=D1=82=D1=8C?= =?UTF-8?q?=20=D0=B0=D0=BD=D1=82=D0=B8=D0=B4=D1=80=D0=B5=D0=B1=D0=B5=D0=B7?= =?UTF-8?q?=D0=B3.?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../inc/stm32f0xx_syscfg.h | 262 +++++++++++++++++++++ 1 file changed, 262 insertions(+) create mode 100644 Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_syscfg.h (limited to 'Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_syscfg.h') diff --git a/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_syscfg.h b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_syscfg.h new file mode 100644 index 0000000..1a1d566 --- /dev/null +++ b/Libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_syscfg.h @@ -0,0 +1,262 @@ +/** + ****************************************************************************** + * @file stm32f0xx_syscfg.h + * @author MCD Application Team + * @version V1.3.0 + * @date 16-January-2014 + * @brief This file contains all the functions prototypes for the SYSCFG firmware + * library. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/*!< Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F0XX_SYSCFG_H +#define __STM32F0XX_SYSCFG_H + +#ifdef __cplusplus + extern "C" { +#endif + +/*!< Includes ------------------------------------------------------------------*/ +#include "stm32f0xx.h" + +/** @addtogroup STM32F0xx_StdPeriph_Driver + * @{ + */ + +/** @addtogroup SYSCFG + * @{ + */ +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/** @defgroup SYSCFG_Exported_Constants + * @{ + */ + +/** @defgroup SYSCFG_EXTI_Port_Sources + * @{ + */ +#define EXTI_PortSourceGPIOA ((uint8_t)0x00) +#define EXTI_PortSourceGPIOB ((uint8_t)0x01) +#define EXTI_PortSourceGPIOC ((uint8_t)0x02) +#define EXTI_PortSourceGPIOD ((uint8_t)0x03) /*!< not available for STM32F031 devices */ +#define EXTI_PortSourceGPIOE ((uint8_t)0x04) /*!< only available for STM32F072 devices */ +#define EXTI_PortSourceGPIOF ((uint8_t)0x05) + +#define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \ + ((PORTSOURCE) == EXTI_PortSourceGPIOB) || \ + ((PORTSOURCE) == EXTI_PortSourceGPIOC) || \ + ((PORTSOURCE) == EXTI_PortSourceGPIOD) || \ + ((PORTSOURCE) == EXTI_PortSourceGPIOE) || \ + ((PORTSOURCE) == EXTI_PortSourceGPIOF)) +/** + * @} + */ + +/** @defgroup SYSCFG_EXTI_Pin_sources + * @{ + */ +#define EXTI_PinSource0 ((uint8_t)0x00) +#define EXTI_PinSource1 ((uint8_t)0x01) +#define EXTI_PinSource2 ((uint8_t)0x02) +#define EXTI_PinSource3 ((uint8_t)0x03) +#define EXTI_PinSource4 ((uint8_t)0x04) +#define EXTI_PinSource5 ((uint8_t)0x05) +#define EXTI_PinSource6 ((uint8_t)0x06) +#define EXTI_PinSource7 ((uint8_t)0x07) +#define EXTI_PinSource8 ((uint8_t)0x08) +#define EXTI_PinSource9 ((uint8_t)0x09) +#define EXTI_PinSource10 ((uint8_t)0x0A) +#define EXTI_PinSource11 ((uint8_t)0x0B) +#define EXTI_PinSource12 ((uint8_t)0x0C) +#define EXTI_PinSource13 ((uint8_t)0x0D) +#define EXTI_PinSource14 ((uint8_t)0x0E) +#define EXTI_PinSource15 ((uint8_t)0x0F) + +#define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \ + ((PINSOURCE) == EXTI_PinSource1) || \ + ((PINSOURCE) == EXTI_PinSource2) || \ + ((PINSOURCE) == EXTI_PinSource3) || \ + ((PINSOURCE) == EXTI_PinSource4) || \ + ((PINSOURCE) == EXTI_PinSource5) || \ + ((PINSOURCE) == EXTI_PinSource6) || \ + ((PINSOURCE) == EXTI_PinSource7) || \ + ((PINSOURCE) == EXTI_PinSource8) || \ + ((PINSOURCE) == EXTI_PinSource9) || \ + ((PINSOURCE) == EXTI_PinSource10) || \ + ((PINSOURCE) == EXTI_PinSource11) || \ + ((PINSOURCE) == EXTI_PinSource12) || \ + ((PINSOURCE) == EXTI_PinSource13) || \ + ((PINSOURCE) == EXTI_PinSource14) || \ + ((PINSOURCE) == EXTI_PinSource15)) +/** + * @} + */ + +/** @defgroup SYSCFG_Memory_Remap_Config + * @{ + */ +#define SYSCFG_MemoryRemap_Flash ((uint8_t)0x00) +#define SYSCFG_MemoryRemap_SystemMemory ((uint8_t)0x01) +#define SYSCFG_MemoryRemap_SRAM ((uint8_t)0x03) + + +#define IS_SYSCFG_MEMORY_REMAP(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \ + ((REMAP) == SYSCFG_MemoryRemap_SystemMemory) || \ + ((REMAP) == SYSCFG_MemoryRemap_SRAM)) + +/** + * @} + */ + +/** @defgroup SYSCFG_DMA_Remap_Config + * @{ + */ +#define SYSCFG_DMARemap_TIM3 SYSCFG_CFGR1_TIM3_DMA_RMP /* Remap TIM3 DMA requests from channel4 to channel6, + available only for STM32F072 devices */ +#define SYSCFG_DMARemap_TIM2 SYSCFG_CFGR1_TIM2_DMA_RMP /* Remap TIM2 DMA requests from channel3/4 to channel7, + available only for STM32F072 devices */ +#define SYSCFG_DMARemap_TIM1 SYSCFG_CFGR1_TIM1_DMA_RMP /* Remap TIM1 DMA requests from channel2/3/4 to channel6, + available only for STM32F072 devices */ +#define SYSCFG_DMARemap_I2C1 SYSCFG_CFGR1_I2C1_DMA_RMP /* Remap I2C1 DMA requests from channel3/2 to channel7/6, + available only for STM32F072 devices */ +#define SYSCFG_DMARemap_USART3 SYSCFG_CFGR1_USART3_DMA_RMP /* Remap USART3 DMA requests from channel6/7 to channel3/2, + available only for STM32F072 devices */ +#define SYSCFG_DMARemap_USART2 SYSCFG_CFGR1_USART2_DMA_RMP /* Remap USART2 DMA requests from channel4/5 to channel6/7, + available only for STM32F072 devices */ +#define SYSCFG_DMARemap_SPI2 SYSCFG_CFGR1_SPI2_DMA_RMP /* Remap SPI2 DMA requests from channel4/5 to channel6/7, + available only for STM32F072 devices */ +#define SYSCFG_DMARemap_TIM17_2 SYSCFG_CFGR1_TIM17_DMA_RMP2 /* Remap TIM17 DMA requests from channel1/2 to channel7, + available only for STM32F072 devices */ +#define SYSCFG_DMARemap_TIM16_2 SYSCFG_CFGR1_TIM16_DMA_RMP2 /* Remap TIM16 DMA requests from channel3/4 to channel6, + available only for STM32F072 devices */ +#define SYSCFG_DMARemap_TIM17 SYSCFG_CFGR1_TIM17_DMA_RMP /* Remap TIM17 DMA requests from channel1 to channel2 */ +#define SYSCFG_DMARemap_TIM16 SYSCFG_CFGR1_TIM16_DMA_RMP /* Remap TIM16 DMA requests from channel3 to channel4 */ +#define SYSCFG_DMARemap_USART1Rx SYSCFG_CFGR1_USART1RX_DMA_RMP /* Remap USART1 Rx DMA requests from channel3 to channel5 */ +#define SYSCFG_DMARemap_USART1Tx SYSCFG_CFGR1_USART1TX_DMA_RMP /* Remap USART1 Tx DMA requests from channel2 to channel4 */ +#define SYSCFG_DMARemap_ADC1 SYSCFG_CFGR1_ADC_DMA_RMP /* Remap ADC1 DMA requests from channel1 to channel2 */ + +#define IS_SYSCFG_DMA_REMAP(REMAP) (((REMAP) == SYSCFG_DMARemap_TIM17) || \ + ((REMAP) == SYSCFG_DMARemap_TIM16) || \ + ((REMAP) == SYSCFG_DMARemap_USART1Rx) || \ + ((REMAP) == SYSCFG_DMARemap_USART1Tx) || \ + ((REMAP) == SYSCFG_CFGR1_TIM3_DMA_RMP) || \ + ((REMAP) == SYSCFG_CFGR1_TIM2_DMA_RMP) || \ + ((REMAP) == SYSCFG_CFGR1_TIM1_DMA_RMP) || \ + ((REMAP) == SYSCFG_CFGR1_I2C1_DMA_RMP) || \ + ((REMAP) == SYSCFG_CFGR1_USART3_DMA_RMP) || \ + ((REMAP) == SYSCFG_CFGR1_USART2_DMA_RMP) || \ + ((REMAP) == SYSCFG_CFGR1_SPI2_DMA_RMP) || \ + ((REMAP) == SYSCFG_CFGR1_TIM17_DMA_RMP2) || \ + ((REMAP) == SYSCFG_CFGR1_TIM16_DMA_RMP2) || \ + ((REMAP) == SYSCFG_DMARemap_ADC1)) + +/** + * @} + */ + +/** @defgroup SYSCFG_I2C_FastModePlus_Config + * @{ + */ +#define SYSCFG_I2CFastModePlus_PB6 SYSCFG_CFGR1_I2C_FMP_PB6 /* Enable Fast Mode Plus on PB6 */ +#define SYSCFG_I2CFastModePlus_PB7 SYSCFG_CFGR1_I2C_FMP_PB7 /* Enable Fast Mode Plus on PB7 */ +#define SYSCFG_I2CFastModePlus_PB8 SYSCFG_CFGR1_I2C_FMP_PB8 /* Enable Fast Mode Plus on PB8 */ +#define SYSCFG_I2CFastModePlus_PB9 SYSCFG_CFGR1_I2C_FMP_PB9 /* Enable Fast Mode Plus on PB9 */ +#define SYSCFG_I2CFastModePlus_I2C1 SYSCFG_CFGR1_I2C_FMP_I2C1 /* Enable Fast Mode Plus on PB10, PB11, PF6 and PF7(only for STM32F0031 and STM32F030 devices) */ +#define SYSCFG_I2CFastModePlus_I2C2 SYSCFG_CFGR1_I2C_FMP_I2C2 /* Enable Fast Mode Plus on I2C2 pins, available only for STM32F072 devices */ +#define SYSCFG_I2CFastModePlus_PA9 SYSCFG_CFGR1_I2C_FMP_PA9 /* Enable Fast Mode Plus on PA9 (only for STM32F031 and STM32F030 devices) */ +#define SYSCFG_I2CFastModePlus_PA10 SYSCFG_CFGR1_I2C_FMP_PA10/* Enable Fast Mode Plus on PA10(only for STM32F031 and STM32F030 devices) */ + +#define IS_SYSCFG_I2C_FMP(PIN) (((PIN) == SYSCFG_I2CFastModePlus_PB6) || \ + ((PIN) == SYSCFG_I2CFastModePlus_PB7) || \ + ((PIN) == SYSCFG_I2CFastModePlus_PB8) || \ + ((PIN) == SYSCFG_I2CFastModePlus_PB9) || \ + ((PIN) == SYSCFG_I2CFastModePlus_I2C1) || \ + ((PIN) == SYSCFG_I2CFastModePlus_I2C2) || \ + ((PIN) == SYSCFG_I2CFastModePlus_PA9) || \ + ((PIN) == SYSCFG_I2CFastModePlus_PA10)) + + +/** + * @} + */ + +/** @defgroup SYSCFG_Lock_Config + * @{ + */ +#define SYSCFG_Break_PVD SYSCFG_CFGR2_PVD_LOCK /*!< Connects the PVD event to the Break Input of TIM1, not available for STM32F030 devices */ +#define SYSCFG_Break_SRAMParity SYSCFG_CFGR2_SRAM_PARITY_LOCK /*!< Connects the SRAM_PARITY error signal to the Break Input of TIM1 */ +#define SYSCFG_Break_Lockup SYSCFG_CFGR2_LOCKUP_LOCK /*!< Connects Lockup output of CortexM0 to the break input of TIM1 */ + +#define IS_SYSCFG_LOCK_CONFIG(CONFIG) (((CONFIG) == SYSCFG_Break_PVD) || \ + ((CONFIG) == SYSCFG_Break_SRAMParity) || \ + ((CONFIG) == SYSCFG_Break_Lockup)) + +/** + * @} + */ + +/** @defgroup SYSCFG_flags_definition + * @{ + */ + +#define SYSCFG_FLAG_PE SYSCFG_CFGR2_SRAM_PE + +#define IS_SYSCFG_FLAG(FLAG) (((FLAG) == SYSCFG_FLAG_PE)) + +/** + * @} + */ + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +/* Function used to set the SYSCFG configuration to the default reset state **/ +void SYSCFG_DeInit(void); + +/* SYSCFG configuration functions *********************************************/ +void SYSCFG_MemoryRemapConfig(uint32_t SYSCFG_MemoryRemap); +void SYSCFG_DMAChannelRemapConfig(uint32_t SYSCFG_DMARemap, FunctionalState NewState); +void SYSCFG_I2CFastModePlusConfig(uint32_t SYSCFG_I2CFastModePlus, FunctionalState NewState); +void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex); +void SYSCFG_BreakConfig(uint32_t SYSCFG_Break); +FlagStatus SYSCFG_GetFlagStatus(uint32_t SYSCFG_Flag); +void SYSCFG_ClearFlag(uint32_t SYSCFG_Flag); + +#ifdef __cplusplus +} +#endif + +#endif /*__STM32F0XX_SYSCFG_H */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -- cgit v1.2.3