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-rw-r--r--src/core.rs16
1 files changed, 13 insertions, 3 deletions
diff --git a/src/core.rs b/src/core.rs
index 6d9a5e1..35ef2a6 100644
--- a/src/core.rs
+++ b/src/core.rs
@@ -4,6 +4,7 @@ use std::fmt;
#[derive(Debug, Clone)]
pub enum Opcode {
Nop,
+ Mov,
Push,
Pop,
Illegal,
@@ -20,6 +21,8 @@ pub struct Op {
}
const OPCODE_NOP: u8 = 0x00;
+const OPCODE_MOV_A_DATA: u8 = 0x74;
+const OPCODE_MOV_DIR_DATA: u8 = 0x75;
const OPCODE_PUSH: u8 = 0xC0;
const OPCODE_POP: u8 = 0xD0;
const OPCODE_SJMP: u8 = 0xD2;
@@ -42,8 +45,12 @@ pub struct Core {
}
impl Core {
- pub fn with_ram_from_hex(hex: String) -> Self {
- Self { pc: 0, ram: Ram::from_hex(hex) }
+ pub fn with_ram_from_hex(hex: String) -> Result<Self, String> {
+ let ram = match Ram::from_hex(hex) {
+ Ok(value) => value,
+ Err(err_string) => return Err(err_string),
+ };
+ Ok(Self { pc: 0, ram })
}
pub fn step(&mut self) -> u16 {
@@ -80,10 +87,11 @@ impl Core {
fn exec(&mut self, op: Op) {
match op.opcode {
Opcode::Nop => (),
+ Opcode::Mov => (),
Opcode::Illegal => (),
Opcode::Push => (),
Opcode::Pop => (),
- Opcode::Sjmp => self.sjmp(op.operand1.unwrap() as i8),
+ Opcode::Sjmp => self.sjmp(op.operand1.expect("JSMP has no operand") as i8),
}
}
@@ -105,6 +113,8 @@ impl Isa8051 for u8 {
fn op(&self) -> (Opcode, usize, Option<Register>) {
match *self {
OPCODE_NOP => (Opcode::Nop, 1, None),
+ OPCODE_MOV_A_DATA => (Opcode::Mov, 1, None),
+ OPCODE_MOV_DIR_DATA => (Opcode::Mov, 1, None),
OPCODE_PUSH => (Opcode::Push, 2, None),
OPCODE_POP => (Opcode::Pop, 2, None),
OPCODE_SJMP => (Opcode::Sjmp, 2, None),