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-rw-r--r--src/core.rs6
-rw-r--r--src/main.rs2
-rw-r--r--src/ram.rs6
3 files changed, 8 insertions, 6 deletions
diff --git a/src/core.rs b/src/core.rs
index 35ef2a6..a4c0ce8 100644
--- a/src/core.rs
+++ b/src/core.rs
@@ -91,7 +91,7 @@ impl Core {
Opcode::Illegal => (),
Opcode::Push => (),
Opcode::Pop => (),
- Opcode::Sjmp => self.sjmp(op.operand1.expect("JSMP has no operand") as i8),
+ Opcode::Sjmp => self.sjmp(op.operand1.expect("SJMP has no operand given") as i8),
}
}
@@ -113,8 +113,8 @@ impl Isa8051 for u8 {
fn op(&self) -> (Opcode, usize, Option<Register>) {
match *self {
OPCODE_NOP => (Opcode::Nop, 1, None),
- OPCODE_MOV_A_DATA => (Opcode::Mov, 1, None),
- OPCODE_MOV_DIR_DATA => (Opcode::Mov, 1, None),
+ OPCODE_MOV_A_DATA => (Opcode::Mov, 2, None),
+ OPCODE_MOV_DIR_DATA => (Opcode::Mov, 3, None),
OPCODE_PUSH => (Opcode::Push, 2, None),
OPCODE_POP => (Opcode::Pop, 2, None),
OPCODE_SJMP => (Opcode::Sjmp, 2, None),
diff --git a/src/main.rs b/src/main.rs
index 17ef6e7..f424b0e 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -55,6 +55,8 @@ fn main() {
},
};
+ println!("{}", core.op());
+
thread::spawn(move || {
let (ref should_stop, ref condvar) = *asyncpair2;
core_worker(core, should_stop, condvar);
diff --git a/src/ram.rs b/src/ram.rs
index 34723cb..a886db3 100644
--- a/src/ram.rs
+++ b/src/ram.rs
@@ -46,11 +46,11 @@ impl HexLine {
if &s[0..1] != ":" {
return Err(0)
}
- let offset = match (&s[3..7]).parse::<u16>() {
+ let offset = match u16::from_str_radix(&s[3..7], 16) {
Ok(value) => value,
Err(_) => return Err(3),
};
- let bytecount = match(&s[1..3]).parse::<usize>() {
+ let bytecount = match usize::from_str_radix(&s[1..3], 16) {
Ok(value) => value,
Err(_) => return Err(1),
};
@@ -62,7 +62,7 @@ impl HexLine {
let mut counter = 9;
let mut data = vec![];
while counter < s.len() - 2 && counter < (9 + bytecount * 2) {
- data.push(match(&s[counter..counter+2]).parse::<u8>() {
+ data.push(match u8::from_str_radix(&s[counter..counter+2], 16) {
Ok(value) => value,
Err(_) => return Err(counter),
});