From 52b665108f6f2203df251eec273184b142ee2e16 Mon Sep 17 00:00:00 2001 From: Oxore Date: Wed, 4 Mar 2020 02:06:37 +0300 Subject: Add Memory trait for Rom, refactor instantiating --- Readme.md | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Readme.md (limited to 'Readme.md') diff --git a/Readme.md b/Readme.md new file mode 100644 index 0000000..9f2c932 --- /dev/null +++ b/Readme.md @@ -0,0 +1,32 @@ +# MCS51 emulator + +## TODO for MVP of MCS51 emulator + +- Fully implements ISA of Atmel 8051. +- Seek to implement compatibility with AT89S52. +- Internal Flash ROM (8K to 64K). +- Internal RAM (256 byte). +- External ROM (up to 64K). +- Interrupts support. +- Peripherals: + - At least one I/O Port (P0) + - Timer (with interrupts) + - Serial UART (with interrupts) +- Cycle accurate emulation of program execution with synchronization of all the + peripherals. +- Can bind execution speed to real host machine time with speed multiplier (e.g. + 1 instruction per second, 1000 cycles per second). +- Every peripheral produces event with information of it's state if it changes. + CPU produces events on each step while in single step mode or when pause + occurs. +- Emulator consumes control events for changing peripherals state, controlling + execution speed or stepping CPU. +- CLI controller. + +## TODO Beyond MVP + +- Full compatibility with AT89S52. +- CPU step back command and reverse execution for some amount of steps (from few + to billions). +- TUI controller. +- Comprehensive GUI in web-browser. -- cgit v1.2.3