From 7d4dfd8af842796c4eb8a88df0cc5ab30f99232d Mon Sep 17 00:00:00 2001 From: Oxore Date: Wed, 4 Mar 2020 03:17:25 +0300 Subject: Rename Core to Cpu8051 and Ram to ProgramMemory, etc. Adjust Readme.md --- Readme.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Readme.md') diff --git a/Readme.md b/Readme.md index 9f2c932..6b8af9e 100644 --- a/Readme.md +++ b/Readme.md @@ -12,9 +12,9 @@ - At least one I/O Port (P0) - Timer (with interrupts) - Serial UART (with interrupts) -- Cycle accurate emulation of program execution with synchronization of all the +- Cycle accurate emulation of program execution and synchronization with all peripherals. -- Can bind execution speed to real host machine time with speed multiplier (e.g. +- Locking execution speed to real host machine time with speed multiplier (e.g. 1 instruction per second, 1000 cycles per second). - Every peripheral produces event with information of it's state if it changes. CPU produces events on each step while in single step mode or when pause -- cgit v1.2.3