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authorMichael Pavone <pavone@retrodev.com>2019-02-02 23:02:19 -0800
committerMichael Pavone <pavone@retrodev.com>2019-02-02 23:02:19 -0800
commit1f7eb1afff1a9b13cde11a786145ba313df3334a (patch)
tree37fc18407ddc2af346237577c157500ce099374f /cpu_dsl.py
parent0d51635f43fe9a94ca1568a972c7ef6bf7afe552 (diff)
Implemented LDI in new Z80 core
Diffstat (limited to 'cpu_dsl.py')
-rwxr-xr-xcpu_dsl.py12
1 files changed, 10 insertions, 2 deletions
diff --git a/cpu_dsl.py b/cpu_dsl.py
index b38a83b..c3f1f70 100755
--- a/cpu_dsl.py
+++ b/cpu_dsl.py
@@ -873,11 +873,19 @@ def _geuCImpl(prog, parent, fieldVals, output):
params = [prog.resolveParam(p, parent, fieldVals) for p in prog.lastOp.params]
return '\n\tif ({a} >= {b}) '.format(a=params[1], b = params[0]) + '{'
else:
- raise ion(">=U not implemented in the general case yet")
+ raise Exception(">=U not implemented in the general case yet")
+
+def _eqCImpl(prog, parent, fieldVals, output):
+ return '\n\tif (!{a}) {'.format(a=prog.resolveParam(prog.lastDst, None, {}))
+
+def _neqCImpl(prog, parent, fieldVals, output):
+ return '\n\tif ({a}) {'.format(a=prog.resolveParam(prog.lastDst, None, {}))
_ifCmpImpl = {
'c': {
- '>=U': _geuCImpl
+ '>=U': _geuCImpl,
+ '=': _eqCImpl,
+ '!=': _neqCImpl
}
}
#represents a DSL conditional construct