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authorMichael Pavone <pavone@retrodev.com>2019-01-31 23:03:51 -0800
committerMichael Pavone <pavone@retrodev.com>2019-01-31 23:03:51 -0800
commit3127207249646a6c3fe54830fe969e2841b8ba52 (patch)
tree2ace07dddfe6ff7fa3d3d17118ee7f863101c334 /cpu_dsl.py
parent90935753f4716fbaa89203a695886930b8e9741e (diff)
Implemented the rest of the rotate instructions in new Z80 core
Diffstat (limited to 'cpu_dsl.py')
-rwxr-xr-xcpu_dsl.py16
1 files changed, 3 insertions, 13 deletions
diff --git a/cpu_dsl.py b/cpu_dsl.py
index 3806741..6c2ca15 100755
--- a/cpu_dsl.py
+++ b/cpu_dsl.py
@@ -326,6 +326,8 @@ def _updateFlagsCImpl(prog, params, rawParams):
resultBit = prog.paramSize(prog.lastDst) - 1
elif calc == 'carry':
resultBit = prog.paramSize(prog.lastDst)
+ if prog.lastOp.op == 'ror':
+ resultBit -= 1
elif calc == 'half':
resultBit = prog.paramSize(prog.lastDst) - 4
myRes = '({a} ^ {b} ^ {res})'.format(a = prog.lastA, b = prog.lastB, res = lastDst)
@@ -578,20 +580,8 @@ def _rlcCImpl(prog, params, rawParams, flagUpdates):
)
def _rorCImpl(prog, params, rawParams, flagUpdates):
- needsCarry = False
- if flagUpdates:
- for flag in flagUpdates:
- calc = prog.flags.flagCalc[flag]
- if calc == 'carry':
- needsCarry = True
- decl = ''
size = prog.paramSize(rawParams[2])
- if needsCarry:
- decl,name = prog.getTemp(size)
- dst = prog.carryFlowDst = name
- else:
- dst = params[2]
- return decl + '\n\t{dst} = {a} >> {b} | {a} << ({size} - {b});'.format(dst = dst,
+ return '\n\t{dst} = {a} >> {b} | {a} << ({size} - {b});'.format(dst = params[2],
a = params[0], b = params[1], size=size
)