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authorMichael Pavone <pavone@retrodev.com>2015-05-26 22:22:30 -0700
committerMichael Pavone <pavone@retrodev.com>2015-05-26 22:22:30 -0700
commit6817ef558d165b50a9b08a337dd93c4f1f46304e (patch)
treed1b737e3b97e312cb91bab1c7305afeaa4b348f0 /ym2612.c
parent81fed3292d80883b76202cf9de913cea60f44627 (diff)
Fix register to operator mapping for channel 3 special mode
Diffstat (limited to 'ym2612.c')
-rw-r--r--ym2612.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/ym2612.c b/ym2612.c
index 2d3404a..cc2fd01 100644
--- a/ym2612.c
+++ b/ym2612.c
@@ -585,14 +585,16 @@ void ym_update_phase_inc(ym2612_context * context, ym_operator * operator, uint3
ym_channel * channel = context->channels + chan_num;
uint32_t inc, detune;
if (chan_num == 2 && context->ch3_mode && (op < (2*4 + 3))) {
- inc = context->ch3_supp[op-2*4].fnum;
- if (!context->ch3_supp[op-2*4].block) {
+ //supplemental fnum registers are in a different order than normal slot paramters
+ int index = (op-2*4) ^ 2;
+ inc = context->ch3_supp[index].fnum;
+ if (!context->ch3_supp[index].block) {
inc >>= 1;
} else {
- inc <<= (context->ch3_supp[op-2*4].block-1);
+ inc <<= (context->ch3_supp[index].block-1);
}
//detune
- detune = detune_table[context->ch3_supp[op-2*4].keycode][operator->detune & 0x3];
+ detune = detune_table[context->ch3_supp[index].keycode][operator->detune & 0x3];
} else {
inc = channel->fnum;
if (!channel->block) {