diff options
author | Oxore <oxore@protonmail.com> | 2023-05-17 00:16:21 +0300 |
---|---|---|
committer | Oxore <oxore@protonmail.com> | 2023-05-17 00:19:41 +0300 |
commit | 1cda51bbea62c61fff3f8ff6225faa8e270cabd7 (patch) | |
tree | 68b7f0d174899e3ef789d2000c50fe811dde423b | |
parent | 253628f0a481ac340642c30cd8e12536e4e17bd7 (diff) |
Rename `reloc` to `ref` everywhere
-rw-r--r-- | disasm.cpp | 86 | ||||
-rw-r--r-- | disasm.h | 14 | ||||
-rw-r--r-- | main.cpp | 22 | ||||
-rw-r--r-- | todo.md | 2 |
4 files changed, 62 insertions, 62 deletions
@@ -166,44 +166,44 @@ static size_t disasm_jsr_jmp( case AddrMode::kAn: // 4e88..4e8f / 4ec8..4ecf return disasm_verbatim(node, instr); case AddrMode::kAnAddr: // 4e90..4e97 / 4ed0..4ed7 - // NOTE: dynamic jump, reloc_addr may possibly be obtained during the + // NOTE: dynamic jump, ref_addr may possibly be obtained during the // trace break; case AddrMode::kAnAddrIncr: // 4e98..4e9f / 4ed8..4edf case AddrMode::kAnAddrDecr: // 4ea0..4ea7 / 4ee0..4ee7 return disasm_verbatim(node, instr); case AddrMode::kD16AnAddr: // 4ea8..4eaf / 4ee8..4eef - // NOTE: dynamic jump, reloc_addr may possibly be obtained during the + // NOTE: dynamic jump, ref_addr may possibly be obtained during the // trace break; case AddrMode::kD8AnXiAddr: // 4eb0..4eb7 / 4ef0..4ef7 - // NOTE: dynamic jump, reloc_addr may possibly be obtained during the + // NOTE: dynamic jump, ref_addr may possibly be obtained during the // trace break; case AddrMode::kWord: // 4eb8 / 4ef8 { - const uint32_t reloc_addr = static_cast<uint32_t>(a.lword); - node.reloc_addr = reloc_addr; - node.has_relocation = true; + const uint32_t ref_addr = static_cast<uint32_t>(a.lword); + node.ref_addr = ref_addr; + node.has_ref = true; } break; case AddrMode::kLong: // 4eb9 / 4ef9 { - const uint32_t reloc_addr = static_cast<uint32_t>(a.lword); - node.reloc_addr = reloc_addr; - node.has_relocation = true; + const uint32_t ref_addr = static_cast<uint32_t>(a.lword); + node.ref_addr = ref_addr; + node.has_ref = true; } break; case AddrMode::kD16PCAddr: // 4eba / 4efa { - const uint32_t reloc_addr = node.offset + kInstructionSizeStepBytes + + const uint32_t ref_addr = node.offset + kInstructionSizeStepBytes + static_cast<uint32_t>(a.d16_pc.d16); - node.reloc_addr = reloc_addr; - node.has_relocation = true; + node.ref_addr = ref_addr; + node.has_ref = true; } break; case AddrMode::kD8PCXiAddr: // 4ebb / 4efb - // NOTE: dynamic jump, reloc_addr may possibly be obtained during the + // NOTE: dynamic jump, ref_addr may possibly be obtained during the // trace break; case AddrMode::kImmediate: // 4ebc / 4efc @@ -370,12 +370,12 @@ static size_t disasm_bra_bsr_bcc( } const int16_t dispmt = kInstructionSizeStepBytes + (dispmt0 ? dispmt0 : GetI16BE(code.buffer + node.offset + kInstructionSizeStepBytes)); - const uint32_t reloc_addr = static_cast<uint32_t>(node.offset + dispmt); + const uint32_t ref_addr = static_cast<uint32_t>(node.offset + dispmt); Condition condition = static_cast<Condition>((instr >> 8) & 0xf); // False condition Indicates BSR node.is_call = (condition == Condition::kF); - node.reloc_addr = reloc_addr; - node.has_relocation = true; + node.ref_addr = ref_addr; + node.has_ref = true; node.op = Op{OpCode::kBcc, opsize, condition, Arg::Displacement(dispmt)}; return node.size; } @@ -996,8 +996,8 @@ static size_t disasm_dbcc(DisasmNode &node, const uint16_t instr, const DataBuff } const int16_t dispmt_raw = GetI16BE(code.buffer + node.offset + kInstructionSizeStepBytes); const int32_t dispmt = dispmt_raw + kInstructionSizeStepBytes; - node.reloc_addr = static_cast<uint32_t>(node.offset + dispmt); - node.has_relocation = true; + node.ref_addr = static_cast<uint32_t>(node.offset + dispmt); + node.has_ref = true; node.op = Op{ OpCode::kDBcc, OpSize::kNone, @@ -1503,8 +1503,8 @@ size_t DisasmNode::Disasm(const DataBuffer &code) return this->size; } size = kInstructionSizeStepBytes; - has_relocation = 0; - reloc_addr = 0; + has_ref = 0; + ref_addr = 0; is_call = false; const uint16_t instr = GetU16BE(code.buffer + this->offset); return m68k_disasm(*this, instr, code); @@ -1515,8 +1515,8 @@ size_t DisasmNode::DisasmAsRaw(const DataBuffer &code) // We assume that machine have no MMU and ROM data always starts with 0 assert(this->offset < code.occupied_size); size = kInstructionSizeStepBytes; - has_relocation = 0; - reloc_addr = 0; + has_ref = 0; + ref_addr = 0; is_call = false; const uint16_t instr = GetU16BE(code.buffer + this->offset); return disasm_verbatim(*this, instr); @@ -1739,9 +1739,9 @@ static size_t snprint_reg_mask( int Arg::SNPrint( char *const buf, const size_t bufsz, - const unsigned relocation, + const unsigned ref_kinds, const uint32_t self_addr, - const uint32_t reloc_addr) const + const uint32_t ref_addr) const { switch (type) { case ArgType::kNone: @@ -1773,25 +1773,25 @@ int Arg::SNPrint( case ArgType::kLong: { const char c = type == ArgType::kLong ? 'l' : 'w'; - if (relocation & kRelocAbsMask) { - if (static_cast<uint32_t>(lword) == reloc_addr) { - return snprintf(buf, bufsz, ".L%08x:%c", reloc_addr, c); + if (ref_kinds & kRelocAbsMask) { + if (static_cast<uint32_t>(lword) == ref_addr) { + return snprintf(buf, bufsz, ".L%08x:%c", ref_addr, c); } else { // It has to be AFTER the mark we are gonna reference here - assert(static_cast<uint32_t>(lword) > reloc_addr); - return snprintf(buf, bufsz, ".L%08x+%d:%c", reloc_addr, lword - reloc_addr, c); + assert(static_cast<uint32_t>(lword) > ref_addr); + return snprintf(buf, bufsz, ".L%08x+%d:%c", ref_addr, lword - ref_addr, c); } } else { return snprintf(buf, bufsz, "0x%x:%c", lword, c); } } case ArgType::kD16PCAddr: - if (relocation & kRelocRelMask) { - if (static_cast<uint32_t>(self_addr + d16_pc.d16 + kInstructionSizeStepBytes) == reloc_addr) { - return snprintf(buf, bufsz, "%%pc@(.L%08x:w)", reloc_addr); + if (ref_kinds & kRelocRelMask) { + if (static_cast<uint32_t>(self_addr + d16_pc.d16 + kInstructionSizeStepBytes) == ref_addr) { + return snprintf(buf, bufsz, "%%pc@(.L%08x:w)", ref_addr); } else { - assert(static_cast<uint32_t>(self_addr + d16_pc.d16 + kInstructionSizeStepBytes) > reloc_addr); - return snprintf(buf, bufsz, "%%pc@(.L%08x+%d:w)", reloc_addr, static_cast<uint32_t>(self_addr + d16_pc.d16 + kInstructionSizeStepBytes) - reloc_addr); + assert(static_cast<uint32_t>(self_addr + d16_pc.d16 + kInstructionSizeStepBytes) > ref_addr); + return snprintf(buf, bufsz, "%%pc@(.L%08x+%d:w)", ref_addr, static_cast<uint32_t>(self_addr + d16_pc.d16 + kInstructionSizeStepBytes) - ref_addr); } } else { return snprintf(buf, bufsz, "%%pc@(%d:w)", d16_pc.d16); @@ -1809,12 +1809,12 @@ int Arg::SNPrint( case ArgType::kRegMaskPredecrement: return snprint_reg_mask(buf, bufsz, uword, type); case ArgType::kDisplacement: - if (relocation & kRelocRelMask) { - if (static_cast<uint32_t>(self_addr + lword) == reloc_addr) { - return snprintf(buf, bufsz, ".L%08x", reloc_addr); + if (ref_kinds & kRelocRelMask) { + if (static_cast<uint32_t>(self_addr + lword) == ref_addr) { + return snprintf(buf, bufsz, ".L%08x", ref_addr); } else { - assert(static_cast<uint32_t>(self_addr + lword) > reloc_addr); - return snprintf(buf, bufsz, ".L%08x+%d", reloc_addr, (self_addr + lword) - reloc_addr); + assert(static_cast<uint32_t>(self_addr + lword) > ref_addr); + return snprintf(buf, bufsz, ".L%08x+%d", ref_addr, (self_addr + lword) - ref_addr); } } else { return snprintf(buf, bufsz, ".%s%d", lword >= 0 ? "+" : "", lword); @@ -1832,19 +1832,19 @@ int Arg::SNPrint( int Op::FPrint( FILE *const stream, - const unsigned relocation, + const unsigned ref_kinds, const uint32_t self_addr, - const uint32_t reloc_addr) const + const uint32_t ref_addr) const { assert(opcode != OpCode::kNone); char mnemonic_str[kMnemonicBufferSize]{}; OpcodeSNPrintf(mnemonic_str, kMnemonicBufferSize, opcode, condition, size_spec); if (arg1.type != ArgType::kNone) { char arg1_str[kArgsBufferSize]{}; - arg1.SNPrint(arg1_str, kArgsBufferSize, relocation, self_addr, reloc_addr); + arg1.SNPrint(arg1_str, kArgsBufferSize, ref_kinds, self_addr, ref_addr); if (arg2.type != ArgType::kNone) { char arg2_str[kArgsBufferSize]{}; - arg2.SNPrint(arg2_str, kArgsBufferSize, relocation, self_addr, reloc_addr); + arg2.SNPrint(arg2_str, kArgsBufferSize, ref_kinds, self_addr, ref_addr); return fprintf(stream, " %s %s,%s", mnemonic_str, arg1_str, arg2_str); } else { return fprintf(stream, " %s %s", mnemonic_str, arg1_str); @@ -297,9 +297,9 @@ struct Arg { int SNPrint( char *buf, size_t bufsz, - unsigned relocation = 0, + unsigned ref_kinds = 0, uint32_t self_addr = 0, - uint32_t reloc_addr = 0) const; + uint32_t ref_addr = 0) const; }; enum class TracedNodeType { @@ -350,9 +350,9 @@ struct Op { } int FPrint( FILE *, - unsigned relocation = 0, + unsigned ref_kinds = 0, uint32_t self_addr = 0, - uint32_t reloc_addr = 0) const; + uint32_t ref_addr = 0) const; }; struct DisasmNode { @@ -361,10 +361,10 @@ struct DisasmNode { const uint32_t offset{}; /// Instruction size in bytes size_t size{kInstructionSizeStepBytes}; - /// Indicates whether `reloc_addr` should be interpreted and how - bool has_relocation{}; + /// Indicates whether `ref_addr` should be interpreted and how + bool has_ref{}; /// Absolute address of where to branch to - uint32_t reloc_addr{}; + uint32_t ref_addr{}; /// Indicates whether instruction is a call (BSR, JSR) or just a branch /// (Bcc, JMP) if `has_branch_addr` is set bool is_call{}; @@ -107,9 +107,9 @@ void DisasmMap::Disasm(const DataBuffer &code, const Settings &) node->DisasmAsRaw(code); } // FIXME implement deep graph walk for DisasmMapType::kTraced case - if (node->has_relocation && node->reloc_addr < code.occupied_size) { + if (node->has_ref && node->ref_addr < code.occupied_size) { auto *const ref_node = insertTracedNode( - node->reloc_addr, TracedNodeType::kInstruction); + node->ref_addr, TracedNodeType::kInstruction); const auto size = ref_node->Disasm(code); assert(size >= kInstructionSizeStepBytes); if (canBeAllocated(*ref_node)) { @@ -225,22 +225,22 @@ static void RenderDisassembly( } fprintf(output, "\n"); } else { - const bool with_relocation = node->has_relocation && s.marks && + const bool with_reference = node->has_ref && s.marks && (s.abs_marks || s.rel_marks); - const auto *referenced = disasm_map.FindNodeByOffset(node->reloc_addr); - if (with_relocation && referenced) { + const auto *referenced = disasm_map.FindNodeByOffset(node->ref_addr); + if (with_reference && referenced) { const uint32_t ref_addr = referenced->offset; - const unsigned relocation = ((s.abs_marks ? kRelocAbsMask : 0) | + const unsigned ref_kinds = ((s.abs_marks ? kRelocAbsMask : 0) | (s.rel_marks ? kRelocRelMask : 0)); - node->op.FPrint(output, relocation, node->offset, ref_addr); + node->op.FPrint(output, ref_kinds, node->offset, ref_addr); } else { node->op.FPrint(output); } } - if (node->has_relocation && s.xrefs_to) { - char reloc_addr_str[12]{}; - snprintf(reloc_addr_str, sizeof(reloc_addr_str), " .L%08x", node->reloc_addr); - fprintf(output, " |%s", reloc_addr_str); + if (node->has_ref && s.xrefs_to) { + char ref_addr_str[12]{}; + snprintf(ref_addr_str, sizeof(ref_addr_str), " .L%08x", node->ref_addr); + fprintf(output, " |%s", ref_addr_str); } if (s.raw_data_comment) { char raw_data_comment[100]{}; @@ -1,6 +1,6 @@ # TODO -- Add tests for relocations with all supported addressing modes. +- Add tests for references of marks with all supported addressing modes. - Implement CLI option that can be used to specify regions of RAM and IO registers. Custom ROM location and size is still not the case, only 4MiB at the base `0x00000000` is supported and it remains. |