| Age | Commit message (Expand) | Author |
|---|---|---|
| 2023-05-10 | Migrate Scc, DBcc, SUBQ and ADDQ to Arg and OpCode | Oxore |
| 2023-05-10 | Migrate whole chunk 4 to Arg and OpCode | Oxore |
| 2023-05-09 | Migrate BTST, BCHG, BCRL, BSET and MOVEP to Arg struct | Oxore |
| 2023-05-09 | Migrate Bcc to new Arg data structure | Oxore |
| 2023-05-09 | Migrate MOVEM to new Arg struct | Oxore |
| 2023-05-09 | Use OpSize instead of suffix for FetchAddrModeArg | Oxore |
| 2023-05-09 | Refactoring: begin migration to new Arg structures | Oxore |
| 2023-05-09 | Refactor: return node size, remove settings from disasm functions | Oxore |
| 2023-05-09 | Begin refactoring: add new data types, remove unused members | Oxore |
| 2023-05-01 | Impl MOVEQ | Oxore |
| 2023-04-30 | Impl MOVEM | Oxore |
| 2023-04-23 | Impl separate xref types call and branch | Oxore |
| 2023-04-23 | Pass settings everywhere, impl cross references | Oxore |
| 2023-04-22 | Split mnemonic and arguments formatting | Oxore |
| 2023-04-21 | Refactor asm rendering | Oxore |
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index : m68k-disasm.git | |
| GNU AS compatible Motorola M68000 ISA disassembler (C++) |
| summaryrefslogtreecommitdiff |